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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12767 { 72 /* adds */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, AMFBS_UseNegativeImmediates, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, },
13205 { 661 /* cmn */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, AMFBS_UseNegativeImmediates, { MCK_GPR32sp, MCK_AddSubImmNeg }, },
13219 { 665 /* cmp */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, AMFBS_None, { MCK_GPR32sp, MCK_AddSubImm }, },
19002 { 5976 /* subs */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, },
20125 { 72 /* adds */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, AMFBS_UseNegativeImmediates, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, },
20563 { 661 /* cmn */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, AMFBS_UseNegativeImmediates, { MCK_GPR32sp, MCK_AddSubImmNeg }, },
20577 { 665 /* cmp */, AArch64::SUBSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, AMFBS_None, { MCK_GPR32sp, MCK_AddSubImm }, },
26360 { 5976 /* subs */, AArch64::SUBSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc25715 case AArch64::SUBSWri:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc26431 case AArch64::SUBSWri:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc65739 /*160113*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSWri), 0,
65751 /*160140*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSWri), 0,
86900 /*200583*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSWri), 0,
93409 /*212528*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSWri), 0,
93421 /*212556*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSWri), 0,
93529 /*212802*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSWri), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 1171 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
1199 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
4128 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18072 case AArch64::SUBSWri:
29810 case AArch64::SUBSWri:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 9456 case AArch64::SUBSWri:
lib/Target/AArch64/AArch64AsmPrinter.cpp 334 OutStreamer->EmitInstruction(MCInstBuilder(AArch64::SUBSWri)
lib/Target/AArch64/AArch64CondBrTuning.cpp 178 case AArch64::SUBSWri:
lib/Target/AArch64/AArch64ConditionOptimizer.cpp 168 case AArch64::SUBSWri:
218 case AArch64::ADDSWri: return AArch64::SUBSWri;
220 case AArch64::SUBSWri: return AArch64::ADDSWri;
lib/Target/AArch64/AArch64ConditionalCompares.cpp 323 case AArch64::SUBSWri:
623 Opc = AArch64::SUBSWri;
657 case AArch64::SUBSWri: Opc = AArch64::CCMPWi; break;
lib/Target/AArch64/AArch64FastISel.cpp 1372 { { AArch64::SUBSWri, AArch64::SUBSXri },
lib/Target/AArch64/AArch64InstrInfo.cpp 586 BuildMI(MBB, I, DL, get(AArch64::SUBSWri), AArch64::WZR)
1016 case AArch64::SUBSWri:
1116 case AArch64::SUBSWri:
1117 return MIDefinesZeroReg ? AArch64::SUBSWri : AArch64::SUBWri;
1236 case AArch64::SUBSWri:
1256 return AArch64::SUBSWri;
1381 return Opcode == AArch64::SUBSWri || Opcode == AArch64::SUBSXri;
1872 return AArch64::SUBSWri;
3511 case AArch64::SUBSWri:
3531 case AArch64::SUBSWri:
lib/Target/AArch64/AArch64InstructionSelector.cpp 3255 CmpOpc = CmpOpc == AArch64::SUBSWrr ? AArch64::SUBSWri : AArch64::SUBSXri;
lib/Target/AArch64/AArch64MacroFusion.cpp 41 case AArch64::SUBSWri:
245 case AArch64::SUBSWri:
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 181 case AArch64::SUBSWri:
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 4114 case AArch64::SUBSWri: