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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
16625   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG01_1__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG0 }, },
16626   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG11_1__imm_95_16, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG1 }, },
16627   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG21_1__imm_95_32, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG2 }, },
16628   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG31_1__imm_95_48, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG3 }, },
16629   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__Imm0_655351_1__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_Imm0_65535 }, },
16631   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__Imm0_655351_1__MovImm64Shifter1_2, AMFBS_None, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, },
23983   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG01_1__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG0 }, },
23984   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG11_1__imm_95_16, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG1 }, },
23985   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG21_1__imm_95_32, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG2 }, },
23986   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__MovWSymbolG31_1__imm_95_48, AMFBS_None, { MCK_GPR64, MCK_MovWSymbolG3 }, },
23987   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__Imm0_655351_1__imm_95_0, AMFBS_None, { MCK_GPR64, MCK_Imm0_65535 }, },
23989   { 3365 /* movk */, AArch64::MOVKXi, Convert__Reg1_0__Tie0_1_1__Imm0_655351_1__MovImm64Shifter1_2, AMFBS_None, { MCK_GPR64, MCK_Imm0_65535, MCK_MovImm64Shifter }, },
gen/lib/Target/AArch64/AArch64GenDAGISel.inc
93302 /*212259*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93305 /*212271*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93308 /*212283*/      OPC_MorphNodeTo1, TARGET_VAL(AArch64::MOVKXi), 0,
93330 /*212328*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93333 /*212340*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93336 /*212352*/      OPC_MorphNodeTo1, TARGET_VAL(AArch64::MOVKXi), 0,
93358 /*212397*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93361 /*212409*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93364 /*212421*/      OPC_MorphNodeTo1, TARGET_VAL(AArch64::MOVKXi), 0,
93386 /*212466*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93389 /*212478*/      OPC_EmitNode1, TARGET_VAL(AArch64::MOVKXi), 0,
93392 /*212490*/      OPC_MorphNodeTo1, TARGET_VAL(AArch64::MOVKXi), 0,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
10072     case AArch64::MOVKXi: {
lib/Target/AArch64/AArch64AsmPrinter.cpp
  839     EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVKXi)
  844     EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::MOVKXi)
  945       MovK.setOpcode(AArch64::MOVKXi);
lib/Target/AArch64/AArch64ExpandImm.cpp
   82     Insn.push_back({ AArch64::MOVKXi, Imm16,
   97     Insn.push_back({ AArch64::MOVKXi, Imm16,
  228   Insn.push_back({ AArch64::MOVKXi, getChunk(UImm, FirstMovkIdx),
  237   Insn.push_back({ AArch64::MOVKXi, getChunk(UImm, SecondMovkIdx),
  291   unsigned Opc = (BitSize == 32 ? AArch64::MOVKWi : AArch64::MOVKXi);
  371       Insn.push_back({ AArch64::MOVKXi, Imm16,
lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
  152     case AArch64::MOVKXi: {
  567       BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi), DstReg)
lib/Target/AArch64/AArch64FrameLowering.cpp
 1037           BuildMI(MBB, MBBI, DL, TII->get(AArch64::MOVKXi), AArch64::X15)
lib/Target/AArch64/AArch64InstrInfo.cpp
 1530     BuildMI(MBB, MI, DL, get(AArch64::MOVKXi), Reg)
 1534     BuildMI(MBB, MI, DL, get(AArch64::MOVKXi), Reg)
 1538     BuildMI(MBB, MI, DL, get(AArch64::MOVKXi), Reg)
lib/Target/AArch64/AArch64InstructionSelector.cpp
 1134     auto MovI = MIB.buildInstr(AArch64::MOVKXi).addDef(DstReg).addUse(SrcReg);
lib/Target/AArch64/AArch64MacroFusion.cpp
  172      (SecondMI.getOpcode() == AArch64::MOVKXi &&
  178        (FirstMI->getOpcode() == AArch64::MOVKXi &&
  180       (SecondMI.getOpcode() == AArch64::MOVKXi &&
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
 1015   case AArch64::MOVKXi:
 1021       Inst.getOpcode() == AArch64::MOVKXi)
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  224   if ((Opcode == AArch64::MOVKXi || Opcode == AArch64::MOVKWi) &&