reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
485 MachineBasicBlock *BB = OldMI->getParent(); 486 auto UsePos = MachineBasicBlock::iterator(OldMI); 490 unsigned OpEnd = OldMI->getNumOperands(); 494 if (HII->getAddrMode(*OldMI) == HexagonII::BaseRegOffset) { 495 short NewOpCode = HII->changeAddrMode_rr_ur(*OldMI); 497 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); 498 MIB.add(OldMI->getOperand(0)); 499 MIB.add(OldMI->getOperand(2)); 500 MIB.add(OldMI->getOperand(3)); 504 } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset && 505 OldMI->getOperand(2).isImm()) { 506 short NewOpCode = HII->changeAddrMode_io_abs(*OldMI); 508 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)) 509 .add(OldMI->getOperand(0)); 511 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); 519 LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); 522 if (OldMI->getOperand(3).isImm() && OldMI->getOperand(3).getImm() == 0) { 522 if (OldMI->getOperand(3).isImm() && OldMI->getOperand(3).getImm() == 0) { 523 short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); 525 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); 526 MIB.add(OldMI->getOperand(0)); 527 MIB.add(OldMI->getOperand(1)); 531 LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); 538 MIB.add(OldMI->getOperand(i));