reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/Hexagon/HexagonExpandCondsets.cpp
  182         return Reg == RR.Reg && Sub == RR.Sub;
  182         return Reg == RR.Reg && Sub == RR.Sub;
  186         return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub);
  186         return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub);
  186         return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub);
  186         return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub);
  296   ReferenceMap::iterator F = Map.find(RR.Reg);
  298     Map.insert(std::make_pair(RR.Reg, Mask));
  305   ReferenceMap::iterator F = Map.find(RR.Reg);
  520       MachineInstrBuilder(MF, DefI).addReg(R.Reg, RegState::Implicit, R.Sub);
  584     if (Register::isVirtualRegister(RS.Reg)) {
  585       const TargetRegisterClass *VC = MRI->getRegClass(RS.Reg);
  589       assert(Register::isPhysicalRegister(RS.Reg));
  590       PhysR = RS.Reg;
  699       MachineInstrBuilder(MF, MI).addReg(RT.Reg, S, RT.Sub);
  768       if (RR.Reg == PredR) {
  772       if (RR.Reg != RD.Reg)
  772       if (RR.Reg != RD.Reg)
  805     if (!Register::isVirtualRegister(RR.Reg))
  923       Op.setReg(RN.Reg);
 1002       if (!Register::isVirtualRegister(RR.Reg))
 1059     UpdRegs.insert(RT.Reg);
 1094   if (!Register::isVirtualRegister(RR.Reg))
 1096   const TargetRegisterClass *RC = MRI->getRegClass(RR.Reg);
 1130   if (MRI->isLiveIn(R1.Reg))
 1132   if (MRI->isLiveIn(R2.Reg))
 1135   LiveInterval &L1 = LIS->getInterval(R1.Reg);
 1136   LiveInterval &L2 = LIS->getInterval(R2.Reg);
 1145                     << printReg(R1.Reg, TRI, R1.Sub) << "  " << L1 << "\n  "
 1146                     << printReg(R2.Reg, TRI, R2.Sub) << "  " << L2 << "\n");
 1158   MRI->replaceRegWith(R2.Reg, R1.Reg);
 1158   MRI->replaceRegWith(R2.Reg, R1.Reg);
 1176   LIS->removeInterval(R2.Reg);
 1178   updateKillFlags(R1.Reg);
 1225       MachineInstr *RDef = getReachingDefForPred(RS, CI, RP.Reg, true);
 1229           UpdRegs.insert(RD.Reg);
 1236       MachineInstr *RDef = getReachingDefForPred(RS, CI, RP.Reg, false);
 1240           UpdRegs.insert(RD.Reg);