reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/ARM/ARMBaseInstrInfo.cpp
 2736   case ARMCC::NE: return ARMCC::NE;
 2736   case ARMCC::NE: return ARMCC::NE;
 3130         case ARMCC::NE: // Z
lib/Target/ARM/ARMConstantIslandPass.cpp
 1876     else if (Pred == ARMCC::NE)
lib/Target/ARM/ARMExpandPseudoInsts.cpp
  982       .addImm(ARMCC::NE)
 1005       .addImm(ARMCC::NE)
 1103       .addImm(ARMCC::NE)
 1125       .addImm(ARMCC::NE)
lib/Target/ARM/ARMFastISel.cpp
 1229       return ARMCC::NE;
 1282       unsigned CCMode = ARMCC::NE;
 1320   unsigned CCMode = ARMCC::NE;
 1676         .addImm(ARMCC::NE)
lib/Target/ARM/ARMISelDAGToDAG.cpp
 3373         case ARMCC::NE:
 3450         case ARMCC::NE:
lib/Target/ARM/ARMISelLowering.cpp
 1800   case ISD::SETNE:  return ARMCC::NE;
 1838   case ISD::SETUNE: CondCode = ARMCC::NE; break;
 4312   case ARMCC::NE:
 5002           CondCode == ARMCC::VC || CondCode == ARMCC::NE) {
 6216         Opc = ARMCC::NE; break;
 6265         Opc = ARMCC::NE; break;
 7795                      DAG.getConstant(ARMCC::NE, dl, MVT::i32));
 8146                      DAG.getConstant(ARMCC::NE, dl, MVT::i32));
 8208                      DAG.getConstant(ARMCC::NE, dl, MVT::i32));
10224       .addMBB(loopMBB).addImm(ARMCC::NE).addReg(ARM::CPSR);
10573     if (MI.getOperand(0).getImm() == ARMCC::NE)
12247   case ARMCC::NE:
13981     assert(CC == ARMCC::NE && "How can a CMPZ node not be EQ or NE?");
14218   if (CC == ARMCC::NE && LHS.getOpcode() == ISD::AND && LHS->hasOneUse() &&
14281   if (CC == ARMCC::NE && FalseVal == RHS && FalseVal != LHS) {
14293   if (CC == ARMCC::NE && LHS.getOpcode() == ARMISD::CMOV && LHS->hasOneUse()) {
14339     } else if (CC == ARMCC::NE && !isNullConstant(RHS) &&
14362                         DAG.getConstant(ARMCC::NE, dl, MVT::i32),
14382   if (Subtarget->isThumb1Only() && CC == ARMCC::NE &&
lib/Target/ARM/ARMInstructionSelector.cpp
  442     Preds.first = ARMCC::NE;
 1152             .add(predOps(ARMCC::NE, ARM::CPSR));
lib/Target/ARM/ARMLowOverheadLoops.cpp
  436   MIB.addImm(ARMCC::NE);        // condition code
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 2296     return CC == ARMCC::EQ || CC == ARMCC::NE;
 2318     return CC == ARMCC::EQ || CC == ARMCC::NE || CC == ARMCC::LT ||
 6980     } else if (Mnemonic == "vcvt" && PredicationCode == ARMCC::NE &&
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
 6165   Inst.addOperand(MCOperand::createImm((Val & 0x1) == 0 ? ARMCC::EQ : ARMCC::NE));
 6211     Code = ARMCC::NE;
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
 1973   case ARMCC::NE:
lib/Target/ARM/Utils/ARMBaseInfo.h
   51   case EQ: return NE;
   52   case NE: return EQ;
   96   case ARMCC::NE:  return "ne";
  117     .Case("ne", ARMCC::NE)