reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
423 if (MI->getOperand(1).getReg() == ARM::SP) { 459 if (!MI->hasOneMemOperand() || 460 (*MI->memoperands_begin())->getAlignment() < 4) 467 Register Rt = MI->getOperand(IsStore ? 1 : 0).getReg(); 468 Register Rn = MI->getOperand(IsStore ? 0 : 1).getReg(); 469 unsigned Offset = MI->getOperand(3).getImm(); 470 unsigned PredImm = MI->getOperand(4).getImm(); 471 Register PredReg = MI->getOperand(5).getReg(); 479 DebugLoc dl = MI->getDebugLoc(); 480 auto MIB = BuildMI(MBB, MI, dl, TII->get(Entry.NarrowOpc1)) 488 MIB.setMemRefs(MI->memoperands()); 491 MIB.setMIFlags(MI->getFlags()); 494 MI->eraseFromBundle(); 499 Register BaseReg = MI->getOperand(0).getReg(); 505 for (unsigned i = 3; i < MI->getNumOperands(); ++i) { 506 if (MI->getOperand(i).getReg() == BaseReg) { 522 if (!MI->getOperand(0).isKill()) 527 Register BaseReg = MI->getOperand(1).getReg(); 540 Register BaseReg = MI->getOperand(1).getReg(); 561 OffsetReg = MI->getOperand(2).getReg(); 562 OffsetKill = MI->getOperand(2).isKill(); 563 OffsetInternal = MI->getOperand(2).isInternalRead(); 565 if (MI->getOperand(3).getImm()) 572 OffsetImm = MI->getOperand(2).getImm(); 581 DebugLoc dl = MI->getDebugLoc(); 582 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, TII->get(Opc)); 587 MIB.addReg(MI->getOperand(0).getReg(), RegState::Define | RegState::Dead); 590 MIB.add(MI->getOperand(0)); 591 MIB.add(MI->getOperand(1)); 604 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum) 605 MIB.add(MI->getOperand(OpNum)); 608 MIB.setMemRefs(MI->memoperands()); 611 MIB.setMIFlags(MI->getFlags()); 613 LLVM_DEBUG(errs() << "Converted 32-bit: " << *MI 616 MBB.erase_instr(MI);