reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/ARM/ARMISelLowering.cpp
 7808     return LowerVECTOR_SHUFFLE_i1(Op, DAG, ST);
 7826         return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));
 7840           return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0));
 7842       return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1,
 7843                          DAG.getConstant(Lane, dl, MVT::i32));
 7851       return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2,
 7852                          DAG.getConstant(Imm, dl, MVT::i32));
 7856       return DAG.getNode(ARMISD::VREV64, dl, VT, V1);
 7858       return DAG.getNode(ARMISD::VREV32, dl, VT, V1);
 7860       return DAG.getNode(ARMISD::VREV16, dl, VT, V1);
 7863       return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1,
 7864                          DAG.getConstant(Imm, dl, MVT::i32));
 7879         return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2)
 7879         return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2)
 7885         return DAG.getNode(ARMISD::VMOVN, dl, VT, V2, V1,
 7886                            DAG.getConstant(0, dl, MVT::i32));
 7888         return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V2,
 7889                            DAG.getConstant(1, dl, MVT::i32));
 7923         SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT),
 7923         SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT),
 7925         return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0),
 7951         return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl);
 7958           return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl);
 7968     EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts);
 7969     V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1);
 7970     V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2);
 7974         Ops.push_back(DAG.getUNDEF(EltVT));
 7976         Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
 7978                                   DAG.getConstant(ShuffleMask[i] & (NumElts-1),
 7981     SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops);
 7982     return DAG.getNode(ISD::BITCAST, dl, VT, Val);
 7986     return LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(Op, DAG);
 7989     if (SDValue NewOp = LowerVECTOR_SHUFFLEv8i8(Op, ShuffleMask, DAG))