reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5658 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 5684 SDValue Copy = DAG.getNode(ISD::CopyFromReg, SDLoc(Op), MVT::f16, Ops); 5685 DAG.ReplaceAllUsesWith(*Move, &Copy); 5699 return DAG.getNode(ARMISD::VMOVhr, SDLoc(Op), 5729 SDValue Cvt = DAG.getNode(ARMISD::VMOVrh, SDLoc(Op), MVT::i32, Op); 5730 DAG.ReplaceAllUsesWith(*ZeroExtend, &Cvt); 5743 if (SDValue Val = CombineVMOVDRRCandidateWithVecOp(N, DAG)) 5746 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, 5747 DAG.getConstant(0, dl, MVT::i32)); 5748 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, 5749 DAG.getConstant(1, dl, MVT::i32)); 5750 return DAG.getNode(ISD::BITCAST, dl, DstVT, 5751 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); 5757 if (DAG.getDataLayout().isBigEndian() && SrcVT.isVector() && 5759 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, 5760 DAG.getVTList(MVT::i32, MVT::i32), 5761 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); 5763 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, 5764 DAG.getVTList(MVT::i32, MVT::i32), Op); 5766 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1));