reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5218 DAG.getTargetLoweringInfo().softenSetCCOperands( 5219 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS); 5224 RHS = DAG.getConstant(0, dl, LHS.getValueType()); 5239 if (!DAG.getTargetLoweringInfo().isTypeLegal(LHS->getValueType(0))) 5245 std::tie(Value, OverflowCmp) = getARMXALUOOp(LHS.getValue(0), DAG, ARMcc); 5252 ARMcc = DAG.getConstant(CondCode, SDLoc(ARMcc), MVT::i32); 5254 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 5256 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, 5262 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); 5263 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 5264 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, 5271 if (SDValue Result = OptimizeVFPBrcond(Op, DAG)) 5278 SDValue ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); 5279 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); 5280 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); 5281 SDVTList VTList = DAG.getVTList(MVT::Other, MVT::Glue); 5283 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); 5285 ARMcc = DAG.getConstant(CondCode2, dl, MVT::i32); 5287 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops);