reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
547 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); 548 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 558 LLT ShiftAmtTy = MRI.getType(MI.getOperand(2).getReg()); 559 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 570 !MRI.getType(DstReg).isValid()) || 572 !MRI.getType(SrcReg).isValid())) { 573 const RegisterBank *DstRB = getRegBank(DstReg, MRI, TRI); 574 const RegisterBank *SrcRB = getRegBank(SrcReg, MRI, TRI); 582 unsigned Size = getSizeInBits(DstReg, MRI, TRI); 593 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); 594 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 622 LLT Ty = MRI.getType(MO.getReg()); 639 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 646 if (MRI.getType(MI.getOperand(0).getReg()).isVector()) 652 if (MRI.getType(MI.getOperand(0).getReg()).isVector()) 682 MRI.use_instructions(MI.getOperand(0).getReg())) { 687 if (onlyUsesFP(UseMI, MRI, TRI)) { 699 MachineInstr *DefMI = MRI.getVRegDef(VReg); 700 if (onlyDefinesFP(*DefMI, MRI, TRI)) 712 LLT SrcTy = MRI.getType(MI.getOperand(2).getReg()); 730 MRI.use_instructions(MI.getOperand(0).getReg()), 731 [&](MachineInstr &MI) { return onlyUsesFP(MI, MRI, TRI); })) 749 MachineInstr *DefMI = MRI.getVRegDef(VReg); 750 if (getRegBank(VReg, MRI, TRI) == &AArch64::FPRRegBank || 751 onlyDefinesFP(*DefMI, MRI, TRI)) 768 LLT SrcTy = MRI.getType(MI.getOperand(MI.getNumOperands()-1).getReg()); 772 any_of(MRI.use_instructions(MI.getOperand(0).getReg()), 773 [&](MachineInstr &MI) { return onlyUsesFP(MI, MRI, TRI); })) { 794 if (getRegBank(MI.getOperand(2).getReg(), MRI, TRI) == &AArch64::FPRRegBank) 804 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 823 MachineInstr *DefMI = MRI.getVRegDef(VReg); 825 const LLT SrcTy = MRI.getType(VReg);