reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
510 const unsigned Opc = MI.getOpcode(); 517 getInstrMappingImpl(MI); 522 const MachineFunction &MF = *MI.getParent()->getParent(); 545 return getSameKindOfOperandsMapping(MI); 547 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); 548 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 558 LLT ShiftAmtTy = MRI.getType(MI.getOperand(2).getReg()); 559 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 563 return getSameKindOfOperandsMapping(MI); 566 Register DstReg = MI.getOperand(0).getReg(); 567 Register SrcReg = MI.getOperand(1).getReg(); 593 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); 594 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 612 unsigned NumOperands = MI.getNumOperands(); 618 auto &MO = MI.getOperand(Idx); 639 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 646 if (MRI.getType(MI.getOperand(0).getReg()).isVector()) 652 if (MRI.getType(MI.getOperand(0).getReg()).isVector()) 682 MRI.use_instructions(MI.getOperand(0).getReg())) { 696 Register VReg = MI.getOperand(0).getReg(); 712 LLT SrcTy = MRI.getType(MI.getOperand(2).getReg()); 730 MRI.use_instructions(MI.getOperand(0).getReg()), 748 Register VReg = MI.getOperand(Idx).getReg(); 768 LLT SrcTy = MRI.getType(MI.getOperand(MI.getNumOperands()-1).getReg()); 768 LLT SrcTy = MRI.getType(MI.getOperand(MI.getNumOperands()-1).getReg()); 772 any_of(MRI.use_instructions(MI.getOperand(0).getReg()), 775 for (unsigned Idx = 0, NumOperands = MI.getNumOperands(); 794 if (getRegBank(MI.getOperand(2).getReg(), MRI, TRI) == &AArch64::FPRRegBank) 804 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); 816 Register VReg = MI.getOperand(1).getReg(); 830 unsigned NumOperands = MI.getNumOperands(); 840 if (MI.getOperand(Idx).isReg() && MI.getOperand(Idx).getReg()) { 840 if (MI.getOperand(Idx).isReg() && MI.getOperand(Idx).getReg()) {