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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/TableGen/Record.h 1649 std::vector<Record*> getValueAsListOfDefs(StringRef FieldName) const;
References
tools/clang/utils/TableGen/ClangAttrEmitter.cpp 79 std::vector<Record *> Spellings = Attr.getValueAsListOfDefs("Spellings");
1554 std::vector<Record*> Accessors = R.getValueAsListOfDefs("Accessors");
1703 ->getValueAsListOfDefs("Subjects");
1710 std::vector<Record *> Opts = Constraint->getValueAsListOfDefs("LangOpts");
1714 return MetaSubject->getValueAsListOfDefs("LangOpts");
1829 SubjectContainer->getValueAsListOfDefs("Subjects");
1846 MetaSubject->getValueAsListOfDefs("Constraints");
1931 std::vector<Record *> Subjects = SubjectObj->getValueAsListOfDefs("Subjects");
1981 std::vector<Record *> Subjects = SubjectObj->getValueAsListOfDefs("Subjects");
2107 std::vector<Record *> Args = Attr->getValueAsListOfDefs("Args");
2165 std::vector<Record *> Args = A->getValueAsListOfDefs("Args");
2186 std::vector<Record *> Args = Attr->getValueAsListOfDefs("Args");
2212 std::vector<Record *> Args = A->getValueAsListOfDefs("Args");
2248 (void)R.getValueAsListOfDefs("Documentation");
2268 std::vector<Record*> ArgRecords = R.getValueAsListOfDefs("Args");
2507 std::vector<Record*> ArgRecords = R.getValueAsListOfDefs("Args");
2828 ArgRecords = R.getValueAsListOfDefs("Args");
2862 Args = R.getValueAsListOfDefs("Args");
2973 std::vector<Record *> Spellings = Attr->getValueAsListOfDefs("Spellings");
3148 std::vector<Record*> ArgRecords = R.getValueAsListOfDefs("Args");
3209 std::vector<Record*> ArgRecords = R.getValueAsListOfDefs("Args");
3275 std::vector<Record *> Args = R.getValueAsListOfDefs("Args");
3322 std::vector<Record *> Subjects = S.getValueAsListOfDefs("Subjects");
3418 std::vector<Record*> Subjects = SubjectObj->getValueAsListOfDefs("Subjects");
3518 std::vector<Record *> LangOpts = R.getValueAsListOfDefs("LangOpts");
3835 Args = R.getValueAsListOfDefs("Args");
3863 Args = R.getValueAsListOfDefs("Args");
4083 std::vector<Record *> Docs = Attr.getValueAsListOfDefs("Documentation");
4135 SubjectObj->getValueAsListOfDefs("Subjects");
tools/clang/utils/TableGen/ClangDiagnosticsEmitter.cpp 49 DiagGroups[i]->getValueAsListOfDefs("SubGroups");
193 std::vector<Record*> SubGroups = Group->getValueAsListOfDefs("SubGroups");
tools/clang/utils/TableGen/ClangOpcodesEmitter.cpp 74 for (auto *Type : TypeClass->getDef()->getValueAsListOfDefs("Types")) {
119 auto Args = R->getValueAsListOfDefs("Args");
164 for (auto *Arg : R->getValueAsListOfDefs("Args"))
179 auto Args = R->getValueAsListOfDefs("Args");
205 auto Args = R->getValueAsListOfDefs("Args");
239 auto Args = R->getValueAsListOfDefs("Args");
294 auto Cases = TypeClass->getDef()->getValueAsListOfDefs("Types");
322 auto Args = R->getValueAsListOfDefs("Args");
tools/clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp 312 T->getValueAsDef("TypeList")->getValueAsListOfDefs("List").size();
344 auto Signature = B->getValueAsListOfDefs("Signature");
411 << Overload.first->getValueAsListOfDefs("Signature").size() << ", "
539 GenType->getValueAsDef("TypeList")->getValueAsListOfDefs("List")) {
548 << GenType->getValueAsDef("TypeList")->getValueAsListOfDefs("List")
tools/clang/utils/TableGen/ClangOptionDocEmitter.cpp 165 for (const Record *Flag : OptionOrGroup->getValueAsListOfDefs("Flags"))
tools/clang/utils/TableGen/ClangSACheckersEmitter.cpp 233 ->getValueAsListOfDefs("PackageOptions");
273 Checker->getValueAsListOfDefs("Dependencies")) {
308 ->getValueAsListOfDefs("CheckerOptions");
tools/clang/utils/TableGen/MveEmitter.cpp 1036 for (Record *RParam : Op->getValueAsListOfDefs("params"))
1222 for (Record *RParam : R->getValueAsListOfDefs("params")) {
utils/TableGen/AsmMatcherEmitter.cpp 941 for (Record *Predicate : TheDef->getValueAsListOfDefs("Predicates"))
2697 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
utils/TableGen/AsmWriterEmitter.cpp 516 Reg.TheDef->getValueAsListOfDefs("RegAltNameIndices");
825 CGA.TheDef->getValueAsListOfDefs("Predicates");
utils/TableGen/CodeEmitterGen.cpp 553 for (Record *Predicate : Inst->TheDef->getValueAsListOfDefs("Predicates")) {
615 for (Record *Predicate : Inst->TheDef->getValueAsListOfDefs("Predicates")) {
utils/TableGen/CodeGenDAGPatterns.cpp 1707 TypeProfile->getValueAsListOfDefs("Constraints");
utils/TableGen/CodeGenHwModes.cpp 32 std::vector<Record*> Modes = R->getValueAsListOfDefs("Modes");
33 std::vector<Record*> Objects = R->getValueAsListOfDefs("Objects");
utils/TableGen/CodeGenInstruction.cpp 414 ImplicitDefs = R->getValueAsListOfDefs("Defs");
415 ImplicitUses = R->getValueAsListOfDefs("Uses");
utils/TableGen/CodeGenRegisters.cpp 80 std::vector<Record*> Comps = TheDef->getValueAsListOfDefs("ComposedOf");
93 TheDef->getValueAsListOfDefs("CoveringSubRegIndices");
169 std::vector<Record*> SRIs = TheDef->getValueAsListOfDefs("SubRegIndices");
170 std::vector<Record*> SRs = TheDef->getValueAsListOfDefs("SubRegs");
191 std::vector<Record*> Aliases = TheDef->getValueAsListOfDefs("Aliases");
619 std::vector<Record*> Indices = Def->getValueAsListOfDefs("SubRegIndices");
747 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
utils/TableGen/CodeGenSchedule.cpp 259 RecVec Opcodes = R->getValueAsListOfDefs("Opcodes");
300 RecVec Classes = Def->getValueAsListOfDefs("Classes");
306 RecVec Opcodes = EC->getValueAsListOfDefs("Opcodes");
331 RecVec Classes = Def->getValueAsListOfDefs("Classes");
338 RecVec Opcodes = EC->getValueAsListOfDefs("Opcodes");
556 if (!ModelKey->getValueAsListOfDefs("IID").empty())
572 RecVec Seq = RWDef->getValueAsListOfDefs("Writes");
578 RecVec Vars = RWDef->getValueAsListOfDefs("Variants");
581 RecVec Selected = Variant->getValueAsListOfDefs("Selected");
603 RecVec RWs = SchedDef->getValueAsListOfDefs("SchedRW");
617 RecVec RWDefs = InstRWDef->getValueAsListOfDefs("OperandReadWrites");
631 RecVec RWDefs = ItinRWDef->getValueAsListOfDefs("OperandReadWrites");
676 findRWs(CGRW.TheDef->getValueAsListOfDefs("Writes"), CGRW.Sequence,
737 RecVec ValidWrites = ReadDef->getValueAsListOfDefs("ValidWrites");
879 findRWs(Inst->TheDef->getValueAsListOfDefs("SchedRW"), Writes, Reads);
944 findRWs(RWDef->getValueAsListOfDefs("OperandReadWrites"),
1158 RecVec ItinRecords = ProcModel.ItinsDef->getValueAsListOfDefs("IID");
1216 for (Record *Pred : ProcModel.ModelDef->getValueAsListOfDefs("UnsupportedFeatures")) {
1254 RecVec Matched = Rec->getValueAsListOfDefs("MatchedItinClasses");
1263 findRWs(Rec->getValueAsListOfDefs("OperandReadWrites"), Writes, Reads);
1285 findRWs(Rec->getValueAsListOfDefs("OperandReadWrites"), Writes, Reads);
1369 RecVec Variants = SchedRW.TheDef->getValueAsListOfDefs("Variants");
1434 const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants");
1454 const RecVec VarDefs = AliasRW.TheDef->getValueAsListOfDefs("Variants");
1519 RecVec SelectedDefs = VInfo.VarOrSeqDef->getValueAsListOfDefs("Selected");
1743 PM.ProcResourceDefs[i]->getValueAsListOfDefs("Resources");
1762 PM.ProcResourceDefs[i]->getValueAsListOfDefs("Resources");
1767 PM.ProcResourceDefs[j]->getValueAsListOfDefs("Resources");
1809 RecVec RegisterClasses = RF->getValueAsListOfDefs("RegClasses");
1847 findRWs(RW->getValueAsListOfDefs("OperandReadWrites"), Writes, Reads);
1994 RecVec Matched = (*II)->getValueAsListOfDefs("MatchedItinClasses");
2003 findRWs((*II)->getValueAsListOfDefs("OperandReadWrites"), Writes, Reads);
2127 RecVec ProcResDefs = ProcWriteResDef->getValueAsListOfDefs("ProcResources");
2154 for (const Record *PredDef : Inst.TheDef->getValueAsListOfDefs("Predicates")) {
utils/TableGen/CodeGenSchedule.h 258 return !ItinsDef->getValueAsListOfDefs("IID").empty();
471 if (!ItinsDef->getValueAsListOfDefs("IID").empty()) {
utils/TableGen/CodeGenTarget.cpp 256 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
268 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
280 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
287 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
530 RootNodes = R->getValueAsListOfDefs("RootNodes");
545 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
utils/TableGen/DFAPacketizerEmitter.cpp 215 std::vector<Record*> FUs = Proc->getValueAsListOfDefs("FU");
256 std::vector<Record*> FUs = Func->getValueAsListOfDefs("CFD");
268 FuncData->getValueAsListOfDefs("FuncList");
300 ItinData->getValueAsListOfDefs("Stages");
316 Stage->getValueAsListOfDefs("Units");
456 std::vector<Record*> ItinDataList = Proc->getValueAsListOfDefs("IID");
utils/TableGen/ExegesisEmitter.cpp 78 Def->getValueAsListOfDefs("IssueCounters")) {
115 Def.getValueAsListOfDefs("IssueCounters").size();
159 return !Def->getValueAsListOfDefs("IssueCounters").empty();
165 for (const Record *ICDef : Def->getValueAsListOfDefs("IssueCounters"))
utils/TableGen/GICombinerEmitter.cpp 278 gatherRules(ActiveRules, R->getValueAsListOfDefs("Rules"));
339 gatherRules(Rules, Combiner->getValueAsListOfDefs("Rules"));
utils/TableGen/InstrDocsEmitter.cpp 219 II->TheDef->getValueAsListOfDefs("Predicates");
utils/TableGen/InstrInfoEmitter.cpp 532 std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
537 std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs");
724 std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses");
730 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
utils/TableGen/PredicateExpander.cpp 230 const RecVec &Opcodes = Rec->getValueAsListOfDefs("Opcodes");
274 expandOpcodeSwitchStatement(OS, Rec->getValueAsListOfDefs("Cases"),
348 return expandCheckPseudo(OS, Rec->getValueAsListOfDefs("ValidOpcodes"));
351 return expandCheckOpcode(OS, Rec->getValueAsListOfDefs("ValidOpcodes"));
354 return expandPredicateSequence(OS, Rec->getValueAsListOfDefs("Predicates"),
358 return expandPredicateSequence(OS, Rec->getValueAsListOfDefs("Predicates"),
404 RecVec Delegates = Fn.getDeclaration()->getValueAsListOfDefs("Delegates");
utils/TableGen/RISCVCompressInstEmitter.cpp 460 std::vector<Record *> RF = Rec->getValueAsListOfDefs("Predicates");
619 std::vector<Record *> RF = Dest.TheDef->getValueAsListOfDefs("Predicates");
utils/TableGen/RegisterBankEmitter.cpp 66 for (const auto &RCDef : getDef().getValueAsListOfDefs("RegisterClasses"))
utils/TableGen/SDNodeProperties.cpp 17 for (Record *Property : R->getValueAsListOfDefs("Properties")) {
utils/TableGen/SubtargetEmitter.cpp 235 RecVec ImpliesList = Feature->getValueAsListOfDefs("Implies");
269 RecVec FeatureList = Processor->getValueAsListOfDefs("Features");
299 RecVec StageList = ItinData->getValueAsListOfDefs("Stages");
312 RecVec UnitList = Stage->getValueAsListOfDefs("Units");
359 RecVec BypassList = ItinData->getValueAsListOfDefs("Bypasses");
390 RecVec FUs = ProcModel.ItinsDef->getValueAsListOfDefs("FU");
404 RecVec BPs = ProcModel.ItinsDef->getValueAsListOfDefs("BP");
629 RecVec ResUnits = PRDef->getValueAsListOfDefs("Resources");
793 RecVec ResUnits = PRDef->getValueAsListOfDefs("Resources");
943 SubResources = PRDef->getValueAsListOfDefs("Resources");
965 RecVec SuperResources = PR->getValueAsListOfDefs("Resources");
1042 SchedModels.findRWs(RWDef->getValueAsListOfDefs("OperandReadWrites"),
1049 RecVec Matched = I->getValueAsListOfDefs("MatchedItinClasses");
1051 SchedModels.findRWs(I->getValueAsListOfDefs("OperandReadWrites"),
1104 RecVec PRVec = WriteRes->getValueAsListOfDefs("ProcResources");
1163 RecVec ValidWrites = ReadAdvance->getValueAsListOfDefs("ValidWrites");
utils/TableGen/X86FoldTablesEmitter.cpp 222 return RegRec->getValueAsListOfDefs("RegTypes")[0]->getValueAsInt("Size");
utils/TableGen/X86RecognizableInstr.cpp 110 std::vector<Record*> Predicates = Rec->getValueAsListOfDefs("Predicates");