reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Overridden By

lib/Target/AArch64/AArch64ISelLowering.cpp
 5975 AArch64TargetLowering::getRegForInlineAsmConstraint(
lib/Target/AMDGPU/SIISelLowering.cpp
10540 SITargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/ARM/ARMISelLowering.cpp
15675 RCPair ARMTargetLowering::getRegForInlineAsmConstraint(
lib/Target/AVR/AVRISelLowering.cpp
 1852 AVRTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/BPF/BPFISelLowering.cpp
  175 BPFTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/Hexagon/HexagonISelLowering.cpp
 2995 HexagonTargetLowering::getRegForInlineAsmConstraint(
lib/Target/Lanai/LanaiISelLowering.cpp
  236 LanaiTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/MSP430/MSP430ISelLowering.cpp
  379 MSP430TargetLowering::getRegForInlineAsmConstraint(
lib/Target/Mips/MipsISelLowering.cpp
 3953 MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/NVPTX/NVPTXISelLowering.cpp
 4275 NVPTXTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/PowerPC/PPCISelLowering.cpp
14306 PPCTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/RISCV/RISCVISelLowering.cpp
 2555 RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/Sparc/SparcISelLowering.cpp
 3255 SparcTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/SystemZ/SystemZISelLowering.cpp
 1070 SystemZTargetLowering::getRegForInlineAsmConstraint(
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  475 WebAssemblyTargetLowering::getRegForInlineAsmConstraint(
lib/Target/X86/X86ISelLowering.cpp
45788 X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
lib/Target/XCore/XCoreISelLowering.cpp
 1927 XCoreTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,

Declarations

include/llvm/CodeGen/TargetLowering.h
 3940   getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,

References

lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
  192                   TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 7816       TLI.getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode,
 7819       TLI.getRegForInlineAsmConstraint(TRI, MatchingOpInfo.ConstraintCode,
 7899   std::tie(AssignedReg, RC) = TLI.getRegForInlineAsmConstraint(
lib/CodeGen/SelectionDAG/TargetLowering.cpp
 4344             getRegForInlineAsmConstraint(TRI, OpInfo.ConstraintCode,
 4347             getRegForInlineAsmConstraint(TRI, Input.ConstraintCode,
lib/Target/AArch64/AArch64ISelLowering.cpp
 6029   Res = TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/AMDGPU/SIISelLowering.cpp
10547       return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
10654   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/ARM/ARMISelLowering.cpp
15746   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/AVR/AVRISelLowering.cpp
 1898   return TargetLowering::getRegForInlineAsmConstraint(
lib/Target/BPF/BPFISelLowering.cpp
  187   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/Hexagon/HexagonISelLowering.cpp
 3047   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/Lanai/LanaiISelLowering.cpp
  248   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/MSP430/MSP430ISelLowering.cpp
  393   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/Mips/MipsISelLowering.cpp
 4015   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/NVPTX/NVPTXISelLowering.cpp
 4297   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/PowerPC/PPCISelLowering.cpp
14367       TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/RISCV/RISCVISelLowering.cpp
 2665   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/Sparc/SparcISelLowering.cpp
 3304       return TargetLowering::getRegForInlineAsmConstraint(TRI, newConstraint,
 3320       return TargetLowering::getRegForInlineAsmConstraint(TRI, newConstraint,
 3325   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/SystemZ/SystemZISelLowering.cpp
 1148   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  499   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/X86/X86ISelLowering.cpp
45973   Res = TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
lib/Target/XCore/XCoreISelLowering.cpp
 1939   return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);