reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/SelectionDAG.h

 1281   SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,

References

lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

 1258         CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg));
 1294           CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg));
 1373   return DAG.getTargetExtractSubreg(AArch64::dsub, SDLoc(V128Reg), NarrowTy,
 1406     SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg);
 1458       SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT,

lib/Target/AArch64/AArch64ISelLowering.cpp

 4876     return DAG.getTargetExtractSubreg(AArch64::hsub, DL, VT, Sel);
 4878     return DAG.getTargetExtractSubreg(AArch64::ssub, DL, VT, Sel);
 4880     return DAG.getTargetExtractSubreg(AArch64::dsub, DL, VT, Sel);
 6248   return DAG.getTargetExtractSubreg(AArch64::dsub, DL, NarrowTy, V128Reg);
12030     Results.push_back(DAG.getTargetExtractSubreg(SubReg1, SDLoc(N), MVT::i64,
12032     Results.push_back(DAG.getTargetExtractSubreg(SubReg2, SDLoc(N), MVT::i64,

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

 2188     = CurDAG->getTargetExtractSubreg(SubReg, SL, VT, SDValue(CmpSwap, 0));

lib/Target/AMDGPU/SIISelLowering.cpp

10508   SDValue PtrLo = DAG.getTargetExtractSubreg(AMDGPU::sub0, DL, MVT::i32, Ptr);
10509   SDValue PtrHi = DAG.getTargetExtractSubreg(AMDGPU::sub1, DL, MVT::i32, Ptr);

lib/Target/ARM/ARMISelDAGToDAG.cpp

 2053                 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
 2331                 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg));
 2496                 CurDAG->getTargetExtractSubreg(ARM::qsub_0 + i, Loc, VT, Data));
 2624                   CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg));
 4728       SDValue Sub0 = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32,
 4730       SDValue Sub1 = CurDAG->getTargetExtractSubreg(ARM::gsub_1, dl, MVT::i32,

lib/Target/ARM/ARMISelLowering.cpp

 9088       DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_1 : ARM::gsub_0,
 9091       DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_0 : ARM::gsub_1,

lib/Target/Hexagon/HexagonISelDAGToDAG.cpp

  520     Value = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo,
  795     SDValue E = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, dl, ResTy,

lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp

 1015         Op = DAG.getTargetExtractSubreg(Sub, dl, HalfTy, Op);
 1406         Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, Vec);
 1408         Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, Vec);

lib/Target/Hexagon/HexagonISelLowering.cpp

 2318       T1 = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, T1);
 2340       ExtV = DAG.getTargetExtractSubreg(SubIdx, dl, MVT::i32, VecV);
 2385     ValR = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, ValR);
 2555       W = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, W);

lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

  470       return DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, VecTy, S);
  540     return DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, P);
  543     return DAG.getTargetExtractSubreg(Hexagon::isub_hi, dl, MVT::i32, P);
  781     VecV = DAG.getTargetExtractSubreg(SubIdx, dl, VecTy, VecV);
  886     V0 = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, VecV);
  887     V1 = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, VecV);
  933     SDValue R0 = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, V);
  934     SDValue R1 = DAG.getTargetExtractSubreg(Hexagon::isub_hi, dl, MVT::i32, V);
 1391     return DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, ResTy, Pair);
 1394     return DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, ResTy, Pair);

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

 4876       SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg);

lib/Target/Sparc/SparcISelDAGToDAG.cpp

  243       SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32,
  245       SDValue Sub1 = CurDAG->getTargetExtractSubreg(SP::sub_odd, dl, MVT::i32,

lib/Target/Sparc/SparcISelLowering.cpp

 2705   SDValue Hi32 = DAG.getTargetExtractSubreg(SP::sub_even, dl, MVT::f32,
 2707   SDValue Lo32 = DAG.getTargetExtractSubreg(SP::sub_odd, dl, MVT::f32,
 2855   SDValue Hi64 = DAG.getTargetExtractSubreg(SP::sub_even64, dl, MVT::f64,
 2857   SDValue Lo64 = DAG.getTargetExtractSubreg(SP::sub_odd64, dl, MVT::f64,

lib/Target/SystemZ/SystemZISelDAGToDAG.cpp

  946     return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N);
 1167         Node, CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, Op).getNode());

lib/Target/SystemZ/SystemZISelLowering.cpp

 2586   Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result);
 2587   Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result);
 3136     return DAG.getTargetExtractSubreg(SystemZ::subreg_h32,
 3145       return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL,
 5059   SDValue Hi = DAG.getTargetExtractSubreg(SystemZ::subreg_h64,
 5061   SDValue Lo = DAG.getTargetExtractSubreg(SystemZ::subreg_l64,

lib/Target/X86/X86ISelDAGToDAG.cpp

 4943           CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result);
 5108           Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg);

lib/Target/X86/X86ISelLowering.cpp

23607     SDValue Result0 = DAG.getTargetExtractSubreg(X86::sub_mask_0, DL,
23609     SDValue Result1 = DAG.getTargetExtractSubreg(X86::sub_mask_1, DL,