|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Declarations
include/llvm/CodeGen/SelectionDAG.h 913 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
References
include/llvm/CodeGen/SelectionDAG.h 775 return getNode(ISD::UNDEF, SDLoc(), VT);
791 return getNode(ISD::UNDEF, SDLoc(), VT);
893 return getNode(ISD::UNDEF, SDLoc(), VT);
898 return getNode(ISD::GLOBAL_OFFSET_TABLE, SDLoc(), VT);
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 2506 DAG.getNode(ISD::CARRY_FALSE, DL, MVT::Glue));
2516 return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE,
2522 DAG.getNode(ISD::CARRY_FALSE, DL, MVT::Glue));
3208 DAG.getNode(ISD::CARRY_FALSE, DL, MVT::Glue));
3213 DAG.getNode(ISD::CARRY_FALSE, DL, MVT::Glue));
3217 return CombineTo(N, N0, DAG.getNode(ISD::CARRY_FALSE, DL, MVT::Glue));
3222 DAG.getNode(ISD::CARRY_FALSE, DL, MVT::Glue));
17718 SDValue ScalarUndef = DAG.getNode(ISD::UNDEF, DL, SVT);
17748 ScalarUndef = DAG.getNode(ISD::UNDEF, DL, SVT);
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 2694 DAG.getNode(ISD::FRAME_TO_ARGS_OFFSET, dl,
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 543 return DAG.getNode(N->getOpcode(), dl, NVT);
2548 Lo = DAG.getNode(ISD::FLT_ROUNDS_, dl, NVT);
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 7189 case 0: return getNode(Opcode, DL, VT);
7206 case 0: return getNode(Opcode, DL, VT);
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 5660 setValue(&I, DAG.getNode(ISD::ADDROFRETURNADDR, sdl,
5664 setValue(&I, DAG.getNode(ISD::SPONENTRY, sdl,
6480 setValue(&I, DAG.getNode(ISD::FLT_ROUNDS_, sdl, MVT::i32));
lib/Target/AArch64/AArch64ISelLowering.cpp 2827 return DAG.getNode(AArch64ISD::THREAD_POINTER, dl, PtrVT);
4528 SDValue ThreadBase = DAG.getNode(AArch64ISD::THREAD_POINTER, DL, PtrVT);
lib/Target/ARM/ARMISelLowering.cpp 1966 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
3227 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT);
3633 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT);
4041 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
8127 SDValue ConVec = DAG.getNode(ISD::UNDEF, dl, ConcatVT);
8197 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT);
lib/Target/Hexagon/HexagonISelLowering.cpp 2457 return DAG.getNode(HexagonISD::VZERO, dl, Ty);
2495 return DAG.getNode(HexagonISD::PFALSE, dl, VecTy);
2497 return DAG.getNode(HexagonISD::PTRUE, dl, VecTy);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 647 return DAG.getNode(HexagonISD::QTRUE, dl, VecTy);
649 return DAG.getNode(HexagonISD::QFALSE, dl, VecTy);
lib/Target/Mips/MipsISelLowering.cpp 2090 SDValue ThreadPointer = DAG.getNode(MipsISD::ThreadPointer, DL, PtrVT);
lib/Target/Mips/MipsSEISelLowering.cpp 2288 return DAG.getNode(MipsISD::ThreadPointer, DL, PtrVT);
lib/Target/NVPTX/NVPTXISelLowering.cpp 2525 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
2536 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
2543 InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
lib/Target/PowerPC/PPCISelLowering.cpp 2674 DAG.getNode(PPCISD::GlobalBaseReg, DL, PtrVT), Hi);
2697 : DAG.getNode(PPCISD::GlobalBaseReg, dl, VT);
2762 return DAG.getNode(PPCISD::GlobalBaseReg, SDLoc(),
2882 GOTPtr = DAG.getNode(PPCISD::PPC32_GOT, dl, PtrVT);
2884 GOTPtr = DAG.getNode(PPCISD::GlobalBaseReg, dl, PtrVT);
2886 GOTPtr = DAG.getNode(PPCISD::PPC32_PICGOT, dl, PtrVT);
2903 GOTPtr = DAG.getNode(PPCISD::GlobalBaseReg, dl, PtrVT);
2905 GOTPtr = DAG.getNode(PPCISD::PPC32_PICGOT, dl, PtrVT);
2921 GOTPtr = DAG.getNode(PPCISD::GlobalBaseReg, dl, PtrVT);
2923 GOTPtr = DAG.getNode(PPCISD::PPC32_PICGOT, dl, PtrVT);
lib/Target/Sparc/SparcISelLowering.cpp 990 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2i32);
1961 SDValue GlobalBase = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, VT);
2043 SDValue Base = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, PtrVT);
2089 SDValue Base = DAG.getNode(SPISD::GLOBAL_BASE_REG, DL, PtrVT);
lib/Target/SystemZ/SystemZISelLowering.cpp 3251 SDValue ArgAdjust = DAG.getNode(SystemZISD::ADJDYNALLOC, DL, MVT::i64);
3275 return DAG.getNode(SystemZISD::ADJDYNALLOC, DL, MVT::i64);
lib/Target/X86/X86ISelLowering.cpp 2235 return DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(),
3860 unsigned(X86::EBX), DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(),
17803 DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), PtrVT), Result);
17825 DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), PtrVT), Result);
17850 DAG.getNode(X86ISD::GlobalBaseReg, dl, PtrVT), Result);
17911 DAG.getNode(X86ISD::GlobalBaseReg, dl, PtrVT), Result);
17972 DAG.getNode(X86ISD::GlobalBaseReg,
18005 DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), PtrVT), InFlag);
18068 DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), PtrVT),
18133 DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), PtrVT),
lib/Target/XCore/XCoreISelLowering.cpp 812 return DAG.getNode(XCoreISD::FRAME_TO_ARGS_OFFSET, SDLoc(Op), MVT::i32);
831 SDValue FrameToArgs = DAG.getNode(XCoreISD::FRAME_TO_ARGS_OFFSET, dl,