|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/SelectionDAG.h 738 SDValue getCondCode(ISD::CondCode Cond);
References
include/llvm/CodeGen/SelectionDAG.h 985 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
1005 False, getCondCode(Cond));
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1648 CC = DAG.getCondCode(InvCC);
1661 CC = DAG.getCondCode(InvCC);
3500 DAG.getCondCode(ISD::SETNE), Tmp3,
3616 CC = DAG.getCondCode(ISD::SETNE);
3645 Tmp4 = DAG.getCondCode(ISD::SETNE);
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp 933 DAG.getCondCode(CCCode), NewLHS, NewRHS,
990 DAG.getCondCode(CCCode)),
1013 DAG.getCondCode(CCCode)),
1722 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1783 DAG.getCondCode(CCCode)), 0);
1800 DAG.getCondCode(CCCode)), 0);
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 3719 LHSHi, RHSHi, DAG.getCondCode(CCCode));
3775 DAG.getCondCode(CCCode));
3804 DAG.getCondCode(CCCode), NewLHS, NewRHS,
3823 DAG.getCondCode(CCCode)), 0);
3840 DAG.UpdateNodeOperands(N, NewLHS, NewRHS, DAG.getCondCode(CCCode)), 0);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 396 NewLHS, NewRHS, DAG.getCondCode(CCCode));
401 NewLHS, NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2)));
lib/Target/AMDGPU/R600ISelLowering.cpp 888 DAG.getCondCode(ISD::SETEQ));
898 DAG.getCondCode(ISD::SETEQ));
979 CC = DAG.getCondCode(InverseCC);
985 CC = DAG.getCondCode(SwapInvCC);
1013 CC = DAG.getCondCode(CCSwapped);
1021 CC = DAG.getCondCode(CCSwapped);
1053 DAG.getCondCode(CCOpcode));
1079 DAG.getCondCode(ISD::SETNE));
lib/Target/AMDGPU/SIISelLowering.cpp 4211 DAG.getCondCode(CCOpcode));
4243 Src1, DAG.getCondCode(CCOpcode));
lib/Target/ARM/ARMISelLowering.cpp 6196 DAG.getCondCode(ISD::SETEQ));