reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Overrides

include/llvm/CodeGen/ScheduleDAG.h

  590     virtual void dumpNode(const SUnit &SU) const = 0;

Declarations

include/llvm/CodeGen/ScheduleDAGInstrs.h

  335     void dumpNode(const SUnit &SU) const override;

References

lib/CodeGen/MachinePipeliner.cpp

 1371       dumpNode(SU);

lib/CodeGen/MachineScheduler.cpp

  629     dumpNode(*SuccSU);
  666     dumpNode(*PredSU);
  912       dumpNode(*SU);
 3272                DAG->dumpNode(*Dep.getSUnit()));

lib/CodeGen/PostRASchedulerList.cpp

  258       dumpNode(*SU);
  463     dumpNode(*SuccSU);
  500   LLVM_DEBUG(dumpNode(*SU));

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

  821       LLVM_DEBUG(dbgs() << "Inserting edge from\n" ; DAG->dumpNode(*From);
  822                  dbgs() << "to\n"; DAG->dumpNode(*SU); dbgs() << '\n');
  868       LLVM_DEBUG(dbgs() << "Found MFMA: "; DAG->dumpNode(SU);

lib/Target/AMDGPU/R600MachineScheduler.cpp

  129     DAG->dumpNode(*SU);
  135         DAG->dumpNode(S);
  190   LLVM_DEBUG(dbgs() << "Top Releasing "; DAG->dumpNode(*SU));
  194   LLVM_DEBUG(dbgs() << "Bottom Releasing "; DAG->dumpNode(*SU));

lib/Target/AMDGPU/SIMachineScheduler.cpp

  473     DAG->dumpNode(*SuccSU);
  614       DAG->dumpNode(*SU);
  617       DAG->dumpNode(*SU);

lib/Target/Hexagon/HexagonMachineScheduler.cpp

  493   DAG->dumpNode(*SU);
  986              DAG->dumpNode(*SU));