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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
include/llvm/CodeGen/ScheduleDAG.h 380 bool addPred(const SDep &D, bool Required = true);
References
include/llvm/CodeGen/ScheduleDAG.h 389 return addPred(Dep);
lib/CodeGen/MachinePipeliner.cpp 704 SU.addPred(Dep);
714 SU.addPred(Dep);
722 SU.addPred(Dep);
729 SU.addPred(Dep);
741 SU.addPred(Dep);
785 I.addPred(Dep);
791 I.addPred(SDep(SU, SDep::Barrier));
806 I.addPred(Dep);
812 I.addPred(SDep(SU, SDep::Barrier));
893 LastSU->addPred(Dep);
1136 TargetSU->addPred(Dep);
1340 Src->addPred(SDep(I, SDep::Artificial));
lib/CodeGen/ScheduleDAGInstrs.cpp 276 UseSU->addPred(Dep);
310 DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias));
315 DefSU->addPred(Dep);
443 UseSU->addPred(Dep);
485 DefSU->addPred(Dep);
528 V2SU.SU->addPred(SDep(SU, SDep::Anti, Reg));
544 SUb->addPred(Dep);
875 ExitSU.addPred(Dep);
1203 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial());
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 89 SU->addPred(D);
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 227 SU->addPred(D);
235 SU->addPred(D);
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 511 if (!SU->addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) {
lib/Target/AMDGPU/AMDGPUSubtarget.cpp 748 SUa->addPred(SDep(SI.getSUnit(), SDep::Artificial));
754 SI.getSUnit()->addPred(SDep(&SU, SDep::Artificial));
824 if (SU->addPred(SDep(From, SDep::Artificial), false))
830 SUv->addPred(SDep(SU, SDep::Artificial), false);
lib/Target/Hexagon/HexagonSubtarget.cpp 304 S1.addPred(A, true);