reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
143 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) 149 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) 256 unsigned Size = TRI->getSpillSize(RC); 257 unsigned Align = TRI->getSpillAlignment(RC); 316 LLVM_DEBUG(dbgs() << "Spilling " << printReg(VirtReg, TRI) 317 << " in " << printReg(AssignedReg, TRI)); 322 TII->storeRegToStackSlot(*MBB, Before, AssignedReg, Kill, FI, &RC, TRI); 344 LLVM_DEBUG(dbgs() << "Reloading " << printReg(VirtReg, TRI) << " into " 345 << printReg(PhysReg, TRI) << '\n'); 348 TII->loadRegFromStackSlot(*MBB, Before, PhysReg, FI, &RC, TRI); 478 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 493 assert((TRI->isSuperRegister(PhysReg, Alias) || 494 TRI->isSuperRegister(Alias, PhysReg)) && 498 if (TRI->isSuperRegister(PhysReg, Alias)) { 501 MO.getParent()->addRegisterKilled(Alias, TRI, true); 537 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 548 if (TRI->isSuperRegister(PhysReg, Alias)) 561 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) 571 LLVM_DEBUG(dbgs() << printReg(VirtReg, TRI) << " corresponding " 572 << printReg(PhysReg, TRI) << " is reserved already.\n"); 583 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << " is disabled.\n"); 585 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 612 LLVM_DEBUG(dbgs() << "Assigning " << printReg(VirtReg, TRI) << " to " 613 << printReg(PhysReg, TRI) << '\n'); 669 << " in class " << TRI->getRegClassName(&RC) 670 << " with hint " << printReg(Hint0, TRI) << '\n'); 678 LLVM_DEBUG(dbgs() << "\tPreferred Register 1: " << printReg(Hint0, TRI) 685 LLVM_DEBUG(dbgs() << "\tPreferred Register 1: " << printReg(Hint0, TRI) 699 LLVM_DEBUG(dbgs() << "\tPreferred Register 0: " << printReg(Hint1, TRI) 706 LLVM_DEBUG(dbgs() << "\tPreferred Register 0: " << printReg(Hint1, TRI) 717 LLVM_DEBUG(dbgs() << "\tRegister: " << printReg(PhysReg, TRI) << ' '); 769 PhysReg = TRI->getSubReg(PhysReg, SubRegIdx); 865 MO.setReg(PhysReg ? TRI->getSubReg(PhysReg, MO.getSubReg()) : Register()); 872 MI.addRegisterKilled(PhysReg, TRI, true); 879 MI.addRegisterDefined(PhysReg, TRI); 911 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 966 LLVM_DEBUG(dbgs() << "\tSetting " << printReg(Reg, TRI) 978 for (unsigned Reg = 1, E = TRI->getNumRegs(); Reg != E; ++Reg) { 980 dbgs() << " " << printReg(Reg, TRI); 1249 PhysRegState.assign(TRI->getNumRegs(), regDisabled); 1297 TRI = STI.getRegisterInfo(); 1303 UsedInInstr.setUniverse(TRI->getNumRegUnits());