reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/MachineRegisterInfo.h

  673   void setRegBank(unsigned Reg, const RegisterBank &RegBank);

References

lib/CodeGen/GlobalISel/RegBankSelect.cpp

  603       MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);

lib/CodeGen/GlobalISel/RegisterBankInfo.cpp

  707     MRI.setRegBank(NewVReg, *PartMap->RegBank);

lib/CodeGen/MIRParser/MIRParser.cpp

  596       MRI.setRegBank(Reg, *Info.D.RegBank);

lib/Target/AArch64/AArch64InstructionSelector.cpp

 1185       MRI.setRegBank(Trunc.getReg(0), RBI.getRegBank(AArch64::GPRRegBankID));

lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

   72       MRI.setRegBank(Reg, *RB);
  612   MRI->setRegBank(LoLHS, *Bank);
  613   MRI->setRegBank(HiLHS, *Bank);
  694       MRI.setRegBank(PhiReg, *DefBank);
  695       MRI.setRegBank(InitReg, *DefBank);
  913           MRI.setRegBank(Op.getReg(), getRegBank(AMDGPU::SGPRRegBankID));
 1102     MRI.setRegBank(IdxReg, getRegBank(AMDGPU::VGPRRegBankID));
 1106   MRI.setRegBank(DstReg, getRegBank(AMDGPU::VGPRRegBankID));
 1374     MRI.setRegBank(DstReg, getRegBank(AMDGPU::VGPRRegBankID));
 1430     MRI.setRegBank(DstReg, getRegBank(AMDGPU::VGPRRegBankID));
 1522         MRI.setRegBank(ShiftAmt.getReg(0), *SrcBank);
 1529       MRI.setRegBank(DstReg, *SrcBank);
 1553       MRI.setRegBank(True.getReg(0), *DstBank);
 1554       MRI.setRegBank(False.getReg(0), *DstBank);
 1555       MRI.setRegBank(DstReg, *DstBank);
 1562         MRI.setRegBank(Sel.getReg(0), *DstBank);
 1584     MRI.setRegBank(DstReg, *SrcBank);
 1585     MRI.setRegBank(Ext.getReg(0), *SrcBank);
 1586     MRI.setRegBank(ShiftAmt.getReg(0), *SrcBank);
 1587     MRI.setRegBank(Shl.getReg(0), *SrcBank);
 1620       MRI.setRegBank(ZextLo, *BankLo);
 1623       MRI.setRegBank(ZextHi, *BankHi);
 1626       MRI.setRegBank(ShiftAmt.getReg(0), *BankHi);
 1629       MRI.setRegBank(ShiftHi, *BankHi);
 1632       MRI.setRegBank(MaskLo, *BankLo);
 1635       MRI.setRegBank(ShiftAmt.getReg(0), *BankHi);
 1638       MRI.setRegBank(ShiftHi, *BankHi);
 1641       MRI.setRegBank(ZextLo, *BankLo);
 1645     MRI.setRegBank(Or.getReg(0), *DstBank);
 1695     MRI.setRegBank(DstReg, *DstMapping.BreakDown[0].RegBank);
 1696     MRI.setRegBank(CastSrc.getReg(0), *SrcBank);
 1697     MRI.setRegBank(One.getReg(0), AMDGPU::SGPRRegBank);
 1698     MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank);
 1699     MRI.setRegBank(IdxHi.getReg(0), AMDGPU::SGPRRegBank);
 1763     MRI.setRegBank(InsReg, *InsSrcBank);
 1764     MRI.setRegBank(CastSrc.getReg(0), *SrcBank);
 1765     MRI.setRegBank(InsLo.getReg(0), *DstBank);
 1766     MRI.setRegBank(InsHi.getReg(0), *DstBank);
 1767     MRI.setRegBank(One.getReg(0), AMDGPU::SGPRRegBank);
 1768     MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank);
 1769     MRI.setRegBank(IdxHi.getReg(0), AMDGPU::SGPRRegBank);

lib/Target/Mips/MipsRegisterBankInfo.cpp

  638     MRI.setRegBank(Dest, getRegBank(Mips::GPRBRegBankID));
  643     MRI.setRegBank(Dest, getRegBank(Mips::GPRBRegBankID));

lib/Target/X86/X86InstructionSelector.cpp

 1371   MRI.setRegBank(DefReg, RegBank);
 1377     MRI.setRegBank(Tmp, RegBank);