reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/MachineOperand.h

  748   void ChangeToRegister(Register Reg, bool isDef, bool isImp = false,

References

lib/CodeGen/PrologEpilogInserter.cpp

 1214         MI.getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
 1237           MI.getOperand(1).ChangeToRegister(0, false);
 1258         MI.getOperand(i).ChangeToRegister(Reg, false /*isDef*/);

lib/Target/AArch64/AArch64InstrInfo.cpp

 3482       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);

lib/Target/AArch64/AArch64InstructionSelector.cpp

 1302       I.getOperand(1).ChangeToRegister(AArch64::XZR, false);
 1305       I.getOperand(1).ChangeToRegister(AArch64::WZR, false);

lib/Target/AArch64/AArch64RegisterInfo.cpp

  472     MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
  511           .ChangeToRegister(ScratchReg, false, false, true);
  535   MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false, true);

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  743             Src1.ChangeToRegister(AMDGPU::M0, false);

lib/Target/AMDGPU/SIInstrInfo.cpp

 1659   NonRegOp.ChangeToRegister(Reg, false, false, IsKill, IsDead, IsUndef, IsDebug);
 3849   MO.ChangeToRegister(Reg, false);
 4040       Src0.ChangeToRegister(Reg, false);
 4047       Src1.ChangeToRegister(Reg, false);
 4073     Src1.ChangeToRegister(Reg, false);
 4112     Src0.ChangeToRegister(Src1.getReg(), false, false, Src1.isKill());
 4117   Src1.ChangeToRegister(Src0Reg, false, false, Src0Kill);
 4144       Src1.ChangeToRegister(Reg, false);
 4150       Src2.ChangeToRegister(Reg, false);

lib/Target/AMDGPU/SIPeepholeSDWA.cpp

 1200     Op.ChangeToRegister(VGPR, false);

lib/Target/AMDGPU/SIRegisterInfo.cpp

  409   FIOp->ChangeToRegister(BaseReg, false);
 1196           FIOp.ChangeToRegister(ResultReg, false, false, true);
 1232         FIOp.ChangeToRegister(TmpReg, false, false, true);

lib/Target/AMDGPU/SIShrinkInstructions.cpp

  375           MI.getOperand(2).ChangeToRegister(Dest->getReg(), false);

lib/Target/ARC/ARCRegisterInfo.cpp

  194     MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);

lib/Target/ARM/ARMBaseInstrInfo.cpp

 2537       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
 2550       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
 2641         MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  820     MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false);
  832     MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true);

lib/Target/ARM/Thumb2InstrInfo.cpp

  489       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
  510       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
  523       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
  557         MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
  662       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);

lib/Target/ARM/ThumbRegisterInfo.cpp

  400       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
  488     MI.getOperand(FIOperandNum).  ChangeToRegister(FrameReg, false /*isDef*/);
  529     MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true);
  533       MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,
  551       MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true);
  555         MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,

lib/Target/AVR/AVRRegisterInfo.cpp

  154     MI.getOperand(FIOperandNum).ChangeToRegister(AVR::R29R28, false);
  243   MI.getOperand(FIOperandNum).ChangeToRegister(AVR::R29R28, false);

lib/Target/BPF/BPFRegisterInfo.cpp

   88     MI.getOperand(i).ChangeToRegister(FrameReg, false);
  119     MI.getOperand(i).ChangeToRegister(FrameReg, false);

lib/Target/Hexagon/HexagonRegisterInfo.cpp

  230   MI.getOperand(FIOp).ChangeToRegister(BP, false, false, IsKill);

lib/Target/Lanai/LanaiRegisterInfo.cpp

  222     MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/false);
  224         .ChangeToRegister(Reg, /*isDef=*/false, /*isImp=*/false,
  244     MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/false);

lib/Target/MSP430/MSP430RegisterInfo.cpp

  136     MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
  153   MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);

lib/Target/Mips/Mips16RegisterInfo.cpp

  143   MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);

lib/Target/Mips/MipsSERegisterInfo.cpp

  256   MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);

lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp

   73           MI.getOperand(0).ChangeToRegister(Reg, /*isDef=*/false);

lib/Target/NVPTX/NVPTXRegisterInfo.cpp

  125   MI.getOperand(FIOperandNum).ChangeToRegister(NVPTX::VRFrame, false);

lib/Target/PowerPC/PPCInstrInfo.cpp

 2629       .ChangeToRegister(ScaleReg, false, false,
 2633       .ChangeToRegister(ToBeChangedReg, false, false, true);
 3649   MI.getOperand(III.OpNoForForwarding).ChangeToRegister(RegMO->getReg(),

lib/Target/PowerPC/PPCRegisterInfo.cpp

 1047   MI.getOperand(FIOperandNum).ChangeToRegister(
 1131   MI.getOperand(OperandBase).ChangeToRegister(StackReg, false);
 1132   MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false, false, true);
 1250   MI.getOperand(FIOperandNum).ChangeToRegister(BaseReg, false);

lib/Target/RISCV/RISCVRegisterInfo.cpp

  142       .ChangeToRegister(FrameReg, false, false, FrameRegIsKill);

lib/Target/Sparc/SparcRegisterInfo.cpp

  118     MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false);
  140     MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
  158   MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);

lib/Target/SystemZ/SystemZRegisterInfo.cpp

  272     MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
  287     MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
  310       MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
  311       MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
  328       MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg,

lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp

   84           .ChangeToRegister(FrameRegister, /*isDef=*/false);
  105               .ChangeToRegister(FrameRegister, /*isDef=*/false);
  130   MI.getOperand(FIOperandNum).ChangeToRegister(FIRegOperand, /*isDef=*/false);

lib/Target/X86/X86InstrBuilder.h

  135   MI->getOperand(Operand).ChangeToRegister(Reg, /*isDef=*/false);

lib/Target/X86/X86InstrInfo.cpp

 5571       MO1.ChangeToRegister(MO0.getReg(), false);

lib/Target/X86/X86OptimizeLEAs.cpp

  553         .ChangeToRegister(DefMI->getOperand(0).getReg(), false);
  556         .ChangeToRegister(X86::NoRegister, false);
  559         .ChangeToRegister(X86::NoRegister, false);

lib/Target/X86/X86RegisterInfo.cpp

  763   MI.getOperand(FIOperandNum).ChangeToRegister(MachineBasePtr, false);

lib/Target/XCore/XCoreRegisterInfo.cpp

  290     MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);