|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Declarations
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 797 MachineInstrBuilder buildUnmerge(ArrayRef<Register> Res, const SrcOp &Op);
References
include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h 305 Builder.buildUnmerge(TmpRegs, MergeI->getOperand(Idx + 1).getReg());
310 Builder.buildUnmerge(DstRegs, MergeI->getOperand(Idx + 1).getReg());
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 127 MIRBuilder.buildUnmerge(VRegs, Reg);
145 MIRBuilder.buildUnmerge(VRegs, Reg);
958 MIRBuilder.buildUnmerge({LHSL, LHSH}, MI.getOperand(2).getReg());
962 MIRBuilder.buildUnmerge({RHSL, RHSH}, MI.getOperand(3).getReg());
1034 MIRBuilder.buildUnmerge(SrcRegs, MI.getOperand(1).getReg());
3047 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1).getReg());
3171 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1).getReg());
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp 606 return buildUnmerge(TmpVec, Op);
lib/Target/AMDGPU/AMDGPUCallLowering.cpp 242 B.buildUnmerge(DstRegs, SrcReg);
lib/Target/ARM/ARMCallLowering.cpp 160 MIRBuilder.buildUnmerge(NewRegs, Arg.Regs[0]);
lib/Target/Mips/MipsCallLowering.cpp 353 MIRBuilder.buildUnmerge(VRegs, ArgsReg);
lib/Target/X86/X86CallLowering.cpp 213 MIRBuilder.buildUnmerge(Regs, VRegs[i]);
419 MIRBuilder.buildUnmerge(Regs, OrigArg.Regs[0]);