reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

  752   MachineInstrBuilder buildExtract(const DstOp &Res, const SrcOp &Src, uint64_t Index);

References

include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

  415     Builder.buildExtract(

lib/CodeGen/GlobalISel/CallLowering.cpp

  164     MIRBuilder.buildExtract(DstRegs[i], SrcReg, Offsets[i]);

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  162     MIRBuilder.buildExtract(NewReg, Reg, MainSize * I);
  169     MIRBuilder.buildExtract(NewReg, Reg, Offset);
 1119   MIRBuilder.buildExtract(MO.getReg(), DstExt, 0);
 2343         MIRBuilder.buildExtract(PartOpReg, MI.getOperand(I).getReg(), Offset);
 2359       MIRBuilder.buildExtract(PartOpReg, MI.getOperand(I).getReg(),
 2849     MIRBuilder.buildExtract(DstReg, Concat, 0);
 3497       MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset);
 3569       MIRBuilder.buildExtract(SegReg, OpReg, ExtractOffset);

lib/Target/AMDGPU/AMDGPUCallLowering.cpp

  256     B.buildExtract(DstRegs[i], BigReg, Offset);
  514       B.buildExtract(OrigRegs[0], RoundedConcat, 0);

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

 1241     B.buildExtract(Dst, Src, 0);
 1271     B.buildExtract(PtrLo32, Src, 0);
 1511     B.buildExtract(Dst, Vec, IdxVal.getValue() * EltTy.getSizeInBits());
 1630     B.buildExtract(DstReg, PCReg, 0);
 1696     B.buildExtract(DstReg, Load, 0);
 2045   auto Hi32 = B.buildExtract(LLT::scalar(32), MI.getOperand(2).getReg(), 32);