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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 4972 RI->InitMCRegisterInfo(AArch64RegDesc, 629, RA, PC, AArch64MCRegisterClasses, 108, AArch64RegUnitRoots, 115, AArch64RegDiffLists, AArch64LaneMaskLists, AArch64RegStrings, AArch64RegClassStrings, AArch64SubRegIdxLists, 100,
20365 InitMCRegisterInfo(AArch64RegDesc, 629, RA, PC,
gen/lib/Target/AMDGPU/AMDGPUGenRegisterInfo.inc17245 RI->InitMCRegisterInfo(AMDGPURegDesc, 3666, RA, PC, AMDGPUMCRegisterClasses, 114, AMDGPURegUnitRoots, 699, AMDGPURegDiffLists, AMDGPULaneMaskLists, AMDGPURegStrings, AMDGPURegClassStrings, AMDGPUSubRegIdxLists, 193,
48726 InitMCRegisterInfo(AMDGPURegDesc, 3666, RA, PC,
gen/lib/Target/AMDGPU/R600GenRegisterInfo.inc 8760 RI->InitMCRegisterInfo(R600RegDesc, 1675, RA, PC, R600MCRegisterClasses, 37, R600RegUnitRoots, 1342, R600RegDiffLists, R600LaneMaskLists, R600RegStrings, R600RegClassStrings, R600SubRegIdxLists, 17,
12357 InitMCRegisterInfo(R600RegDesc, 1675, RA, PC,
gen/lib/Target/ARC/ARCGenRegisterInfo.inc 455 RI->InitMCRegisterInfo(ARCRegDesc, 34, RA, PC, ARCMCRegisterClasses, 4, ARCRegUnitRoots, 33, ARCRegDiffLists, ARCLaneMaskLists, ARCRegStrings, ARCRegClassStrings, ARCSubRegIdxLists, 1,
802 InitMCRegisterInfo(ARCRegDesc, 34, RA, PC,
gen/lib/Target/ARM/ARMGenRegisterInfo.inc 3524 RI->InitMCRegisterInfo(ARMRegDesc, 295, RA, PC, ARMMCRegisterClasses, 122, ARMRegUnitRoots, 83, ARMRegDiffLists, ARMLaneMaskLists, ARMRegStrings, ARMRegClassStrings, ARMSubRegIdxLists, 57,
15960 InitMCRegisterInfo(ARMRegDesc, 295, RA, PC,
gen/lib/Target/AVR/AVRGenRegisterInfo.inc 799 RI->InitMCRegisterInfo(AVRRegDesc, 53, RA, PC, AVRMCRegisterClasses, 18, AVRRegUnitRoots, 35, AVRRegDiffLists, AVRLaneMaskLists, AVRRegStrings, AVRRegClassStrings, AVRSubRegIdxLists, 3,
1702 InitMCRegisterInfo(AVRRegDesc, 53, RA, PC,
gen/lib/Target/BPF/BPFGenRegisterInfo.inc 329 RI->InitMCRegisterInfo(BPFRegDesc, 25, RA, PC, BPFMCRegisterClasses, 2, BPFRegUnitRoots, 12, BPFRegDiffLists, BPFLaneMaskLists, BPFRegStrings, BPFRegClassStrings, BPFSubRegIdxLists, 2,
688 InitMCRegisterInfo(BPFRegDesc, 25, RA, PC,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2214 RI->InitMCRegisterInfo(HexagonRegDesc, 197, RA, PC, HexagonMCRegisterClasses, 25, HexagonRegUnitRoots, 127, HexagonRegDiffLists, HexagonLaneMaskLists, HexagonRegStrings, HexagonRegClassStrings, HexagonSubRegIdxLists, 10,
3665 InitMCRegisterInfo(HexagonRegDesc, 197, RA, PC,
gen/lib/Target/Lanai/LanaiGenRegisterInfo.inc 510 RI->InitMCRegisterInfo(LanaiRegDesc, 41, RA, PC, LanaiMCRegisterClasses, 3, LanaiRegUnitRoots, 33, LanaiRegDiffLists, LanaiLaneMaskLists, LanaiRegStrings, LanaiRegClassStrings, LanaiSubRegIdxLists, 2,
914 InitMCRegisterInfo(LanaiRegDesc, 41, RA, PC,
gen/lib/Target/MSP430/MSP430GenRegisterInfo.inc 282 RI->InitMCRegisterInfo(MSP430RegDesc, 33, RA, PC, MSP430MCRegisterClasses, 2, MSP430RegUnitRoots, 16, MSP430RegDiffLists, MSP430LaneMaskLists, MSP430RegStrings, MSP430RegClassStrings, MSP430SubRegIdxLists, 2,
608 InitMCRegisterInfo(MSP430RegDesc, 33, RA, PC,
gen/lib/Target/Mips/MipsGenRegisterInfo.inc 3752 RI->InitMCRegisterInfo(MipsRegDesc, 442, RA, PC, MipsMCRegisterClasses, 70, MipsRegUnitRoots, 321, MipsRegDiffLists, MipsLaneMaskLists, MipsRegStrings, MipsRegClassStrings, MipsSubRegIdxLists, 12,
7357 InitMCRegisterInfo(MipsRegDesc, 442, RA, PC,
gen/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc 729 RI->InitMCRegisterInfo(NVPTXRegDesc, 96, RA, PC, NVPTXMCRegisterClasses, 13, NVPTXRegUnitRoots, 95, NVPTXRegDiffLists, NVPTXLaneMaskLists, NVPTXRegStrings, NVPTXRegClassStrings, NVPTXSubRegIdxLists, 1,
1309 InitMCRegisterInfo(NVPTXRegDesc, 96, RA, PC,
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 3774 RI->InitMCRegisterInfo(PPCRegDesc, 344, RA, PC, PPCMCRegisterClasses, 34, PPCRegUnitRoots, 171, PPCRegDiffLists, PPCLaneMaskLists, PPCRegStrings, PPCRegClassStrings, PPCSubRegIdxLists, 7,
5683 InitMCRegisterInfo(PPCRegDesc, 344, RA, PC,
gen/lib/Target/RISCV/RISCVGenRegisterInfo.inc 1057 RI->InitMCRegisterInfo(RISCVRegDesc, 97, RA, PC, RISCVMCRegisterClasses, 12, RISCVRegUnitRoots, 64, RISCVRegDiffLists, RISCVLaneMaskLists, RISCVRegStrings, RISCVRegClassStrings, RISCVSubRegIdxLists, 2,
1817 InitMCRegisterInfo(RISCVRegDesc, 97, RA, PC,
gen/lib/Target/Sparc/SparcGenRegisterInfo.inc 1830 RI->InitMCRegisterInfo(SparcRegDesc, 236, RA, PC, SparcMCRegisterClasses, 13, SparcRegUnitRoots, 171, SparcRegDiffLists, SparcLaneMaskLists, SparcRegStrings, SparcRegClassStrings, SparcSubRegIdxLists, 7,
2782 InitMCRegisterInfo(SparcRegDesc, 236, RA, PC,
gen/lib/Target/SystemZ/SystemZGenRegisterInfo.inc 1724 RI->InitMCRegisterInfo(SystemZRegDesc, 195, RA, PC, SystemZMCRegisterClasses, 22, SystemZRegUnitRoots, 98, SystemZRegDiffLists, SystemZLaneMaskLists, SystemZRegStrings, SystemZRegClassStrings, SystemZSubRegIdxLists, 7,
2948 InitMCRegisterInfo(SystemZRegDesc, 195, RA, PC,
gen/lib/Target/WebAssembly/WebAssemblyGenRegisterInfo.inc 228 RI->InitMCRegisterInfo(WebAssemblyRegDesc, 13, RA, PC, WebAssemblyMCRegisterClasses, 6, WebAssemblyRegUnitRoots, 12, WebAssemblyRegDiffLists, WebAssemblyLaneMaskLists, WebAssemblyRegStrings, WebAssemblyRegClassStrings, WebAssemblySubRegIdxLists, 1,
562 InitMCRegisterInfo(WebAssemblyRegDesc, 13, RA, PC,
gen/lib/Target/X86/X86GenRegisterInfo.inc 4230 RI->InitMCRegisterInfo(X86RegDesc, 282, RA, PC, X86MCRegisterClasses, 118, X86RegUnitRoots, 163, X86RegDiffLists, X86LaneMaskLists, X86RegStrings, X86RegClassStrings, X86SubRegIdxLists, 11,
9931 InitMCRegisterInfo(X86RegDesc, 282, RA, PC,
gen/lib/Target/XCore/XCoreGenRegisterInfo.inc 276 RI->InitMCRegisterInfo(XCoreRegDesc, 17, RA, PC, XCoreMCRegisterClasses, 2, XCoreRegUnitRoots, 16, XCoreRegDiffLists, XCoreLaneMaskLists, XCoreRegStrings, XCoreRegClassStrings, XCoreSubRegIdxLists, 1,
560 InitMCRegisterInfo(XCoreRegDesc, 17, RA, PC,
unittests/CodeGen/MachineInstrTest.cpp 57 InitMCRegisterInfo(nullptr, 0, 0, 0, nullptr, 0, nullptr, 0, nullptr,