reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

  316     if (MCID.mayLoad())

lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

 3486         bool mayLoad = MCID.mayLoad();

lib/MCA/InstrBuilder.cpp

  391   bool AssumeUsesOnly = MCDesc.mayStore() && !MCDesc.mayLoad() &&
  463   bool AssumeDefsOnly = !MCDesc.mayStore() && MCDesc.mayLoad() &&
  565   ID->MayLoad = MCDesc.mayLoad();

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

 3020   if (!Desc.mayLoad() || !Desc.mayStore())

lib/Target/AMDGPU/SIInstrInfo.cpp

  154   if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad())
  154   if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad())

lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

  325       if (TII.get(Opc).mayStore() || !TII.get(Opc).mayLoad() || TII.isGather4(Opc))

lib/Target/ARM/ARMBaseInstrInfo.cpp

 3643     if (Subtarget.isSwift() && (Desc.mayLoad() || Desc.mayStore()))
 4362     return DefMCID.mayLoad() ? 3 : 1;

lib/Target/Hexagon/HexagonConstExtenders.cpp

  874   if (D.mayLoad() || D.mayStore()) {
 1067   assert(D.mayLoad() || D.mayStore());

lib/Target/Hexagon/HexagonInstrInfo.cpp

 2014   return !isTC1(MI) && !isTC2Early(MI) && !MI.getDesc().mayLoad() &&
 2997   if (MI.getDesc().mayLoad() || MI.getDesc().mayStore()) {
 4242   if (MI.getDesc().mayLoad() || MI.getDesc().mayStore()) {

lib/Target/Hexagon/HexagonOptAddrMode.cpp

  128   if ((!MID.mayStore() && !MID.mayLoad()) || HII->isPredicated(MI))
  194     if ((!UseMID.mayLoad() && !UseMID.mayStore()) ||
  357     if ((!MID.mayLoad() && !MID.mayStore()) ||
  362     MachineOperand BaseOp = MID.mayLoad() ? MI->getOperand(1)
  368     MachineOperand OffsetOp = MID.mayLoad() ? MI->getOperand(2)
  417   MachineOperand &BaseOp = MID.mayLoad() ? UseMI->getOperand(1)
  419   MachineOperand &OffsetOp = MID.mayLoad() ? UseMI->getOperand(2)
  444     if ((MID.mayLoad() || MID.mayStore())) {
  639     if (UseMID.mayLoad()) {
  673   if (MID.mayLoad())

lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp

  464     if ((Desc.mayLoad() && std::get<1>(Producer) == 1) ||
  554         HexagonMCInstrInfo::getDesc(MCII, I).mayLoad()) {

lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp

  155     setLoad(HexagonMCInstrInfo::getDesc(MCII, *id).mayLoad());
  379       if (HexagonMCInstrInfo::getDesc(MCII, ID).mayLoad()) {
  438     if (HexagonMCInstrInfo::getDesc(MCII, ID).mayLoad()) {

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 2069   if ((MCID.mayLoad() || MCID.mayStore()) && !IsPCRelativeLoad) {
 2081             expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad());
 2091               expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad());
 2095             expandMemInst(Inst, IDLoc, Out, STI, MCID.mayLoad());
 2104     if (MCID.mayLoad() && Inst.getOpcode() != Mips::LWP_MM) {

lib/Target/PowerPC/PPCHazardRecognizers.cpp

   33   if (!MCID->mayLoad())
  284   isLoad  = MCID.mayLoad();

lib/Target/SystemZ/SystemZInstrBuilder.h

   32   if (MCID.mayLoad())

lib/Target/X86/X86InstrBuilder.h

  204   if (MCID.mayLoad())

tools/llvm-cfi-verify/lib/FileAnalysis.cpp

  329     bool canLoad = !MII->get(IndirectCF.Instruction.getOpcode()).mayLoad();
  345           if (!canLoad || !InstrDesc.mayLoad())

tools/llvm-mca/Views/InstructionInfoView.cpp

   81     TempStream << (MCDesc.mayLoad() ? " *     " : "       ");