reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Mips/MipsGenDAGISel.inc
30398   return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLT(MVT::i32);
include/llvm/CodeGen/TargetLowering.h
 3713     return VT.bitsLT(MinVT) ? MinVT : VT;
lib/CodeGen/CodeGenPrepare.cpp
 1160   if (SrcVT.bitsLT(DstVT)) return false;
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 9748     if (SrcVT.bitsLT(VT) && VT.isVector()) {
10129     EVT MinAssertVT = AssertVT.bitsLT(BigA_AssertVT) ? AssertVT : BigA_AssertVT;
10148     if (AssertVT.bitsLT(BigA_AssertVT)) {
10392       EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT()))
10563     if (N0.getOperand(0).getValueType().bitsLT(VT))
13082     if (VT.bitsLT(In.getValueType()))
16740     if (ResultVT.bitsLT(VecEltVT))
16962   if (ScalarVT.bitsLT(LVT) && !TLI.isTruncateFree(LVT, ScalarVT))
18557       SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
19022       EVT ScaleVT = SVT.bitsLT(InnerSVT) ? VT : InnerVT;
20116       if (VT.bitsLT(SCC.getValueType()))
lib/CodeGen/SelectionDAG/FastISel.cpp
  518   if (IdxVT.bitsLT(PtrVT)) {
 1900     if (DstVT.bitsLT(SrcVT))
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 1415     if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) {
 2968       if (NewEltVT.bitsLT(EltVT)) {
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 4136     if (N->getOperand(i).getValueType().bitsLT(NOutVTElem))
lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  221     assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  506   if (BoolVT.bitsLT(CondVT))
 2008       if (N->getValueType(0).bitsLT(N->getOperand(0).getValueType()))
 2266   if (N->getValueType(0).bitsLT(EltVT)) {
 5046   assert(StVT.bitsLT(ValOp.getValueType()));
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 4248     SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
 4480     assert(Operand.getValueType().bitsLT(VT) &&
 4507     assert(Operand.getValueType().bitsLT(VT) &&
 4526     assert(Operand.getValueType().bitsLT(VT) &&
 4545     assert(Operand.getValueType().bitsLT(VT) &&
 4583             .bitsLT(VT.getScalarType()))
 4841     if (LegalSVT.bitsLT(SVT))
 4928     if (LegalSVT.bitsLT(VT.getScalarType()))
 6129     if (VT.bitsLT(LargestVT)) {
 6728     assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
 6901   assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  292       ValueVT.bitsLT(PartEVT)) {
  305     if (ValueVT.bitsLT(PartEVT)) {
  319     if (ValueVT.bitsLT(Val.getValueType()))
  330       ValueVT.bitsLT(PartEVT)) {
lib/CodeGen/SelectionDAG/TargetLowering.cpp
 3450           else if (Op0.getValueType().bitsLT(VT))
 6868       if (VT.bitsLT(MVT::i32)) {
lib/CodeGen/TargetLoweringBase.cpp
  998   if (EVT(DestVT).bitsLT(NewVT))    // Value is expanded, e.g. i64 -> i16.
 1451   if (EVT(DestVT).bitsLT(NewVT))   // Value is expanded, e.g. i64 -> i16.
 1487       if (VT.bitsLT(MinVT))
lib/Target/AArch64/AArch64FastISel.cpp
 5001   if (IdxVT.bitsLT(PtrVT)) {
lib/Target/AArch64/AArch64ISelLowering.cpp
 4820   if (SrcVT.bitsLT(VT))
 6324     if (SrcEltTy.bitsLT(SmallestEltTy)) {
lib/Target/AMDGPU/R600ISelLowering.cpp
 1329   if (MemVT.bitsLT(MVT::i32))
 1448       ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) {
 1677   if (VT.bitsLT(MVT::i32))
lib/Target/AMDGPU/SIISelLowering.cpp
 1442       VT.bitsLT(MemVT)) {
 4328     if (NewVT.bitsLT(MVT::i32)) {
 7233   if (VT.bitsLT(Op.getValueType()))
lib/Target/ARM/ARMISelLowering.cpp
 7397     if (SrcEltTy.bitsLT(SmallestEltTy))
lib/Target/ARM/ARMSelectionDAGInfo.cpp
   92     else if (Src.getValueType().bitsLT(MVT::i32))
lib/Target/Mips/MipsISelLowering.cpp
 3872   return VT.bitsLT(MinVT) ? MinVT : VT;
lib/Target/X86/X86FastISel.cpp
 3647     if (DstVT.bitsLT(SrcVT))
lib/Target/X86/X86ISelLowering.cpp
 2721   return VT.bitsLT(MinVT) ? MinVT : VT;