reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AArch64/AArch64ISelLowering.cpp
  582   setTargetDAGCombine(ISD::OR);
  584   setTargetDAGCombine(ISD::AND);
  588   setTargetDAGCombine(ISD::ADD);
  589   setTargetDAGCombine(ISD::SUB);
  590   setTargetDAGCombine(ISD::SRL);
  591   setTargetDAGCombine(ISD::XOR);
  592   setTargetDAGCombine(ISD::SINT_TO_FP);
  593   setTargetDAGCombine(ISD::UINT_TO_FP);
  595   setTargetDAGCombine(ISD::FP_TO_SINT);
  596   setTargetDAGCombine(ISD::FP_TO_UINT);
  597   setTargetDAGCombine(ISD::FDIV);
  599   setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN);
  601   setTargetDAGCombine(ISD::ANY_EXTEND);
  602   setTargetDAGCombine(ISD::ZERO_EXTEND);
  603   setTargetDAGCombine(ISD::SIGN_EXTEND);
  604   setTargetDAGCombine(ISD::BITCAST);
  605   setTargetDAGCombine(ISD::CONCAT_VECTORS);
  606   setTargetDAGCombine(ISD::STORE);
  608     setTargetDAGCombine(ISD::LOAD);
  610   setTargetDAGCombine(ISD::MUL);
  612   setTargetDAGCombine(ISD::SELECT);
  613   setTargetDAGCombine(ISD::VSELECT);
  615   setTargetDAGCombine(ISD::INTRINSIC_VOID);
  616   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
  617   setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
  619   setTargetDAGCombine(ISD::GlobalAddress);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  489   setTargetDAGCombine(ISD::BITCAST);
  490   setTargetDAGCombine(ISD::SHL);
  491   setTargetDAGCombine(ISD::SRA);
  492   setTargetDAGCombine(ISD::SRL);
  493   setTargetDAGCombine(ISD::TRUNCATE);
  494   setTargetDAGCombine(ISD::MUL);
  495   setTargetDAGCombine(ISD::MULHU);
  496   setTargetDAGCombine(ISD::MULHS);
  497   setTargetDAGCombine(ISD::SELECT);
  498   setTargetDAGCombine(ISD::SELECT_CC);
  499   setTargetDAGCombine(ISD::STORE);
  500   setTargetDAGCombine(ISD::FADD);
  501   setTargetDAGCombine(ISD::FSUB);
  502   setTargetDAGCombine(ISD::FNEG);
  503   setTargetDAGCombine(ISD::FABS);
  504   setTargetDAGCombine(ISD::AssertZext);
  505   setTargetDAGCombine(ISD::AssertSext);
  506   setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN);
lib/Target/AMDGPU/R600ISelLowering.cpp
  275   setTargetDAGCombine(ISD::FP_ROUND);
  276   setTargetDAGCombine(ISD::FP_TO_SINT);
  277   setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
  278   setTargetDAGCombine(ISD::SELECT_CC);
  279   setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
  280   setTargetDAGCombine(ISD::LOAD);
lib/Target/AMDGPU/SIISelLowering.cpp
  700   setTargetDAGCombine(ISD::ADD);
  701   setTargetDAGCombine(ISD::ADDCARRY);
  702   setTargetDAGCombine(ISD::SUB);
  703   setTargetDAGCombine(ISD::SUBCARRY);
  704   setTargetDAGCombine(ISD::FADD);
  705   setTargetDAGCombine(ISD::FSUB);
  706   setTargetDAGCombine(ISD::FMINNUM);
  707   setTargetDAGCombine(ISD::FMAXNUM);
  708   setTargetDAGCombine(ISD::FMINNUM_IEEE);
  709   setTargetDAGCombine(ISD::FMAXNUM_IEEE);
  710   setTargetDAGCombine(ISD::FMA);
  711   setTargetDAGCombine(ISD::SMIN);
  712   setTargetDAGCombine(ISD::SMAX);
  713   setTargetDAGCombine(ISD::UMIN);
  714   setTargetDAGCombine(ISD::UMAX);
  715   setTargetDAGCombine(ISD::SETCC);
  716   setTargetDAGCombine(ISD::AND);
  717   setTargetDAGCombine(ISD::OR);
  718   setTargetDAGCombine(ISD::XOR);
  719   setTargetDAGCombine(ISD::SINT_TO_FP);
  720   setTargetDAGCombine(ISD::UINT_TO_FP);
  721   setTargetDAGCombine(ISD::FCANONICALIZE);
  722   setTargetDAGCombine(ISD::SCALAR_TO_VECTOR);
  723   setTargetDAGCombine(ISD::ZERO_EXTEND);
  724   setTargetDAGCombine(ISD::SIGN_EXTEND_INREG);
  725   setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
  726   setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
  730   setTargetDAGCombine(ISD::LOAD);
  731   setTargetDAGCombine(ISD::STORE);
  732   setTargetDAGCombine(ISD::ATOMIC_LOAD);
  733   setTargetDAGCombine(ISD::ATOMIC_STORE);
  734   setTargetDAGCombine(ISD::ATOMIC_CMP_SWAP);
  735   setTargetDAGCombine(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
  736   setTargetDAGCombine(ISD::ATOMIC_SWAP);
  737   setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD);
  738   setTargetDAGCombine(ISD::ATOMIC_LOAD_SUB);
  739   setTargetDAGCombine(ISD::ATOMIC_LOAD_AND);
  740   setTargetDAGCombine(ISD::ATOMIC_LOAD_OR);
  741   setTargetDAGCombine(ISD::ATOMIC_LOAD_XOR);
  742   setTargetDAGCombine(ISD::ATOMIC_LOAD_NAND);
  743   setTargetDAGCombine(ISD::ATOMIC_LOAD_MIN);
  744   setTargetDAGCombine(ISD::ATOMIC_LOAD_MAX);
  745   setTargetDAGCombine(ISD::ATOMIC_LOAD_UMIN);
  746   setTargetDAGCombine(ISD::ATOMIC_LOAD_UMAX);
  747   setTargetDAGCombine(ISD::ATOMIC_LOAD_FADD);
lib/Target/ARM/ARMISelLowering.cpp
  736     setTargetDAGCombine(ISD::BRCOND);
  737     setTargetDAGCombine(ISD::BR_CC);
  899     setTargetDAGCombine(ISD::INTRINSIC_VOID);
  900     setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
  901     setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN);
  902     setTargetDAGCombine(ISD::SHL);
  903     setTargetDAGCombine(ISD::SRL);
  904     setTargetDAGCombine(ISD::SRA);
  905     setTargetDAGCombine(ISD::FP_TO_SINT);
  906     setTargetDAGCombine(ISD::FP_TO_UINT);
  907     setTargetDAGCombine(ISD::FDIV);
  908     setTargetDAGCombine(ISD::LOAD);
  922     setTargetDAGCombine(ISD::BUILD_VECTOR);
  923     setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
  924     setTargetDAGCombine(ISD::INSERT_VECTOR_ELT);
  925     setTargetDAGCombine(ISD::STORE);
  926     setTargetDAGCombine(ISD::SIGN_EXTEND);
  927     setTargetDAGCombine(ISD::ZERO_EXTEND);
  928     setTargetDAGCombine(ISD::ANY_EXTEND);
 1415   setTargetDAGCombine(ISD::ADD);
 1416   setTargetDAGCombine(ISD::SUB);
 1417   setTargetDAGCombine(ISD::MUL);
 1418   setTargetDAGCombine(ISD::AND);
 1419   setTargetDAGCombine(ISD::OR);
 1420   setTargetDAGCombine(ISD::XOR);
 1423     setTargetDAGCombine(ISD::SRL);
 1425     setTargetDAGCombine(ISD::SHL);
 1455     setTargetDAGCombine(ISD::ABS);
lib/Target/Hexagon/HexagonISelLowering.cpp
 1567   setTargetDAGCombine(ISD::VSELECT);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
  197   setTargetDAGCombine(ISD::VSELECT);
lib/Target/Lanai/LanaiISelLowering.cpp
  141   setTargetDAGCombine(ISD::ADD);
  142   setTargetDAGCombine(ISD::SUB);
  143   setTargetDAGCombine(ISD::AND);
  144   setTargetDAGCombine(ISD::OR);
  145   setTargetDAGCombine(ISD::XOR);
lib/Target/Mips/MipsISelLowering.cpp
  500   setTargetDAGCombine(ISD::SDIVREM);
  501   setTargetDAGCombine(ISD::UDIVREM);
  502   setTargetDAGCombine(ISD::SELECT);
  503   setTargetDAGCombine(ISD::AND);
  504   setTargetDAGCombine(ISD::OR);
  505   setTargetDAGCombine(ISD::ADD);
  506   setTargetDAGCombine(ISD::SUB);
  507   setTargetDAGCombine(ISD::AssertZext);
  508   setTargetDAGCombine(ISD::SHL);
lib/Target/Mips/MipsSEISelLowering.cpp
  101     setTargetDAGCombine(ISD::SHL);
  102     setTargetDAGCombine(ISD::SRA);
  103     setTargetDAGCombine(ISD::SRL);
  104     setTargetDAGCombine(ISD::SETCC);
  105     setTargetDAGCombine(ISD::VSELECT);
  163     setTargetDAGCombine(ISD::AND);
  164     setTargetDAGCombine(ISD::OR);
  165     setTargetDAGCombine(ISD::SRA);
  166     setTargetDAGCombine(ISD::VSELECT);
  167     setTargetDAGCombine(ISD::XOR);
  210   setTargetDAGCombine(ISD::MUL);
lib/Target/NVPTX/NVPTXISelLowering.cpp
  517   setTargetDAGCombine(ISD::ADD);
  518   setTargetDAGCombine(ISD::AND);
  519   setTargetDAGCombine(ISD::FADD);
  520   setTargetDAGCombine(ISD::MUL);
  521   setTargetDAGCombine(ISD::SHL);
  522   setTargetDAGCombine(ISD::SREM);
  523   setTargetDAGCombine(ISD::UREM);
  528     setTargetDAGCombine(ISD::SETCC);
lib/Target/PowerPC/PPCISelLowering.cpp
 1109   setTargetDAGCombine(ISD::ADD);
 1110   setTargetDAGCombine(ISD::SHL);
 1111   setTargetDAGCombine(ISD::SRA);
 1112   setTargetDAGCombine(ISD::SRL);
 1113   setTargetDAGCombine(ISD::MUL);
 1114   setTargetDAGCombine(ISD::SINT_TO_FP);
 1115   setTargetDAGCombine(ISD::BUILD_VECTOR);
 1117     setTargetDAGCombine(ISD::UINT_TO_FP);
 1118   setTargetDAGCombine(ISD::LOAD);
 1119   setTargetDAGCombine(ISD::STORE);
 1120   setTargetDAGCombine(ISD::BR_CC);
 1122     setTargetDAGCombine(ISD::BRCOND);
 1123   setTargetDAGCombine(ISD::BSWAP);
 1124   setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN);
 1125   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);
 1126   setTargetDAGCombine(ISD::INTRINSIC_VOID);
 1128   setTargetDAGCombine(ISD::SIGN_EXTEND);
 1129   setTargetDAGCombine(ISD::ZERO_EXTEND);
 1130   setTargetDAGCombine(ISD::ANY_EXTEND);
 1132   setTargetDAGCombine(ISD::TRUNCATE);
 1133   setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
 1137     setTargetDAGCombine(ISD::TRUNCATE);
 1138     setTargetDAGCombine(ISD::SETCC);
 1139     setTargetDAGCombine(ISD::SELECT_CC);
 1144     setTargetDAGCombine(ISD::FDIV);
 1145     setTargetDAGCombine(ISD::FSQRT);
 1149     setTargetDAGCombine(ISD::ABS);
 1150     setTargetDAGCombine(ISD::VSELECT);
lib/Target/Sparc/SparcISelLowering.cpp
 1801     setTargetDAGCombine(ISD::BITCAST);
lib/Target/SystemZ/SystemZISelLowering.cpp
  607   setTargetDAGCombine(ISD::ZERO_EXTEND);
  608   setTargetDAGCombine(ISD::SIGN_EXTEND);
  609   setTargetDAGCombine(ISD::SIGN_EXTEND_INREG);
  610   setTargetDAGCombine(ISD::LOAD);
  611   setTargetDAGCombine(ISD::STORE);
  612   setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
  613   setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
  614   setTargetDAGCombine(ISD::FP_ROUND);
  615   setTargetDAGCombine(ISD::FP_EXTEND);
  616   setTargetDAGCombine(ISD::BSWAP);
  617   setTargetDAGCombine(ISD::SDIV);
  618   setTargetDAGCombine(ISD::UDIV);
  619   setTargetDAGCombine(ISD::SREM);
  620   setTargetDAGCombine(ISD::UREM);
lib/Target/X86/X86ISelLowering.cpp
 1837   setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
 1838   setTargetDAGCombine(ISD::SCALAR_TO_VECTOR);
 1839   setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
 1840   setTargetDAGCombine(ISD::CONCAT_VECTORS);
 1841   setTargetDAGCombine(ISD::INSERT_SUBVECTOR);
 1842   setTargetDAGCombine(ISD::EXTRACT_SUBVECTOR);
 1843   setTargetDAGCombine(ISD::BITCAST);
 1844   setTargetDAGCombine(ISD::VSELECT);
 1845   setTargetDAGCombine(ISD::SELECT);
 1846   setTargetDAGCombine(ISD::SHL);
 1847   setTargetDAGCombine(ISD::SRA);
 1848   setTargetDAGCombine(ISD::SRL);
 1849   setTargetDAGCombine(ISD::OR);
 1850   setTargetDAGCombine(ISD::AND);
 1851   setTargetDAGCombine(ISD::ADD);
 1852   setTargetDAGCombine(ISD::FADD);
 1853   setTargetDAGCombine(ISD::FSUB);
 1854   setTargetDAGCombine(ISD::FNEG);
 1855   setTargetDAGCombine(ISD::FMA);
 1856   setTargetDAGCombine(ISD::FMINNUM);
 1857   setTargetDAGCombine(ISD::FMAXNUM);
 1858   setTargetDAGCombine(ISD::SUB);
 1859   setTargetDAGCombine(ISD::LOAD);
 1860   setTargetDAGCombine(ISD::MLOAD);
 1861   setTargetDAGCombine(ISD::STORE);
 1862   setTargetDAGCombine(ISD::MSTORE);
 1863   setTargetDAGCombine(ISD::TRUNCATE);
 1864   setTargetDAGCombine(ISD::ZERO_EXTEND);
 1865   setTargetDAGCombine(ISD::ANY_EXTEND);
 1866   setTargetDAGCombine(ISD::SIGN_EXTEND);
 1867   setTargetDAGCombine(ISD::SIGN_EXTEND_INREG);
 1868   setTargetDAGCombine(ISD::ANY_EXTEND_VECTOR_INREG);
 1869   setTargetDAGCombine(ISD::SIGN_EXTEND_VECTOR_INREG);
 1870   setTargetDAGCombine(ISD::ZERO_EXTEND_VECTOR_INREG);
 1871   setTargetDAGCombine(ISD::SINT_TO_FP);
 1872   setTargetDAGCombine(ISD::UINT_TO_FP);
 1873   setTargetDAGCombine(ISD::SETCC);
 1874   setTargetDAGCombine(ISD::MUL);
 1875   setTargetDAGCombine(ISD::XOR);
 1876   setTargetDAGCombine(ISD::MSCATTER);
 1877   setTargetDAGCombine(ISD::MGATHER);
lib/Target/XCore/XCoreISelLowering.cpp
  169   setTargetDAGCombine(ISD::STORE);
  170   setTargetDAGCombine(ISD::ADD);
  171   setTargetDAGCombine(ISD::INTRINSIC_VOID);
  172   setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN);