reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/BasicTTIImpl.h

  244     AM.Scale = Scale;
  270     AM.Scale = Scale;

lib/CodeGen/CodeGenPrepare.cpp

 2127     if (Scale && other.Scale && Scale != other.Scale)
 2127     if (Scale && other.Scale && Scale != other.Scale)
 2127     if (Scale && other.Scale && Scale != other.Scale)
 2127     if (Scale && other.Scale && Scale != other.Scale)
 2143     return !BaseOffs && !Scale && !(BaseGV && BaseReg);
 2181       if (!Scale)
 2183           if (AM.Scale) {
 2184             Scale = AM.Scale;
 2184             Scale = AM.Scale;
 2193       Scale = 1;
 2234   if (Scale) {
 2236        << Scale << "*";
 3493   if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
 3500   TestAddrMode.Scale += Scale;
 3518     TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale;
 4372   if (AddrMode.Scale == 0) {
 4373     AddrMode.Scale = 1;
 4377     AddrMode.Scale = 0;
 4792     if (AddrMode.Scale && AddrMode.ScaledReg->getType()->isPointerTy()) {
 4795       if (ResultPtr || AddrMode.Scale != 1)
 4799       AddrMode.Scale = 0;
 4809     if (AddrMode.Scale) {
 4831       } else if (!ResultPtr && AddrMode.Scale == 1) {
 4834         AddrMode.Scale = 0;
 4839         !AddrMode.BaseReg && !AddrMode.Scale && !AddrMode.BaseOffs) {
 4862       if (AddrMode.Scale) {
 4873         if (AddrMode.Scale != 1)
 4874           V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
 4919     Type *ScaleTy = AddrMode.Scale ? AddrMode.ScaledReg->getType() : nullptr;
 4949     if (AddrMode.Scale) {
 4969       if (AddrMode.Scale != 1)
 4970         V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

13479       AM.Scale = 1;
13488       AM.Scale = 1;

lib/CodeGen/TargetLoweringBase.cpp

 1743   switch (AM.Scale) {

lib/Target/AArch64/AArch64ISelLowering.cpp

 9132   if (AM.HasBaseReg && AM.BaseOffs && AM.Scale)
 9145   if (!AM.Scale) {
 9163   return AM.Scale == 1 || (AM.Scale > 0 && (uint64_t)AM.Scale == NumBytes);
 9163   return AM.Scale == 1 || (AM.Scale > 0 && (uint64_t)AM.Scale == NumBytes);
 9163   return AM.Scale == 1 || (AM.Scale > 0 && (uint64_t)AM.Scale == NumBytes);
 9184     return AM.Scale != 0 && AM.Scale != 1;
 9184     return AM.Scale != 0 && AM.Scale != 1;

lib/Target/AMDGPU/SIISelLowering.cpp

 1069     return AM.BaseOffs == 0 && AM.Scale == 0;
 1080     return isUInt<11>(AM.BaseOffs) && AM.Scale == 0;
 1083   return isUInt<12>(AM.BaseOffs) && AM.Scale == 0;
 1088     return isInt<13>(AM.BaseOffs) && AM.Scale == 0;
 1122   switch (AM.Scale) {
 1183     if (AM.Scale == 0) // r + i or just i, depending on HasBaseReg.
 1186     if (AM.Scale == 1 && AM.HasBaseReg)
 1202     if (AM.Scale == 0) // r + i or just i, depending on HasBaseReg.
 1205     if (AM.Scale == 1 && AM.HasBaseReg)

lib/Target/ARC/ARCISelLowering.cpp

  701   return AM.Scale == 0;

lib/Target/ARM/ARMISelLowering.cpp

14855       return AM.Scale < 0 ? 1 : 0; // positive offsets execute faster
14977   int Scale = AM.Scale;
15015   const int Scale = AM.Scale;
15041   switch (AM.Scale) {
15058     int Scale = AM.Scale;

lib/Target/AVR/AVRISelLowering.cpp

  750   if (AM.BaseGV && !AM.HasBaseReg && AM.Scale == 0 && Offs == 0) {
  762   if (AM.BaseGV == 0 && AM.HasBaseReg && AM.Scale == 0 && isUInt<6>(Offs)) {

lib/Target/Hexagon/HexagonISelLowering.cpp

 3084   int Scale = AM.Scale;

lib/Target/Mips/MipsISelLowering.cpp

 4121   switch (AM.Scale) {

lib/Target/NVPTX/NVPTXISelLowering.cpp

 4229     return !AM.BaseOffs && !AM.HasBaseReg && !AM.Scale;
 4232   switch (AM.Scale) {

lib/Target/PowerPC/PPCISelLowering.cpp

14484   switch (AM.Scale) {

lib/Target/RISCV/RISCVISelLowering.cpp

  264   switch (AM.Scale) {

lib/Target/SystemZ/SystemZISelLowering.cpp

  925     return AM.Scale == 0;
  928     return AM.Scale == 0 || AM.Scale == 1;
  928     return AM.Scale == 0 || AM.Scale == 1;

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  523   if (AM.Scale != 0)

lib/Target/X86/X86ISelLowering.cpp

28926         Subtarget.is64Bit() && (AM.BaseOffs || AM.Scale > 1))
28930   switch (AM.Scale) {
46147     return AM.Scale != 0;

lib/Target/XCore/XCoreISelLowering.cpp

 1888     return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs);
 1892     return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 &&
 1899     if (AM.Scale == 0) {
 1903     return AM.Scale == 1 && AM.BaseOffs == 0;
 1907     if (AM.Scale == 0) {
 1911     return AM.Scale == 2 && AM.BaseOffs == 0;
 1914     if (AM.Scale == 0) {
 1918     return AM.Scale == 4 && AM.BaseOffs == 0;