reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenCallingConv.inc
   85   if (ArgFlags.isInReg()) {
gen/lib/Target/AMDGPU/AMDGPUGenCallingConv.inc
  159   if (ArgFlags.isInReg()) {
  175   if (!ArgFlags.isInReg()) {
gen/lib/Target/AMDGPU/R600GenCallingConv.inc
   18   if (ArgFlags.isInReg()) {
gen/lib/Target/Lanai/LanaiGenCallingConv.inc
   36     if (ArgFlags.isInReg()) {
gen/lib/Target/Mips/MipsGenCallingConv.inc
  118       if (ArgFlags.isInReg()) {
  274       if (ArgFlags.isInReg()) {
  640   if (ArgFlags.isInReg()) {
  715       if (ArgFlags.isInReg()) {
  732       if (ArgFlags.isInReg()) {
gen/lib/Target/Sparc/SparcGenCallingConv.inc
   65   if (ArgFlags.isInReg()) {
gen/lib/Target/X86/X86GenCallingConv.inc
  403     if (ArgFlags.isInReg()) {
  433     if (ArgFlags.isInReg()) {
  647   if (ArgFlags.isInReg()) {
  659   if (ArgFlags.isInReg()) {
  671   if (ArgFlags.isInReg()) {
 2886   if (ArgFlags.isInReg()) {
lib/Target/AArch64/AArch64FastISel.cpp
 3231     if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal() ||
lib/Target/AArch64/AArch64ISelLowering.cpp
 3350       if (Ins[I].Flags.isInReg()) {
lib/Target/AMDGPU/SIISelLowering.cpp
 1577         !Arg->Flags.isInReg() && PSInputNum <= 15) {
lib/Target/Mips/MipsFastISel.cpp
 1522     if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal())
lib/Target/Mips/MipsISelLowering.cpp
 2756   if (ArgFlags.isInReg() && !Subtarget.isLittle()) {
lib/Target/PowerPC/PPCFastISel.cpp
 1613     if (Flags.isInReg() || Flags.isSRet() || Flags.isNest() || Flags.isByVal())
lib/Target/X86/X86FastISel.cpp
 3560         ((Is64Bit || Ins[i].Flags.isInReg()) && !Subtarget->hasSSE1())) {
lib/Target/X86/X86ISelLowering.cpp
 2850         ((Is64Bit || Ins[InsIndex].Flags.isInReg()) && !Subtarget.hasSSE1())) {
 2929   if (Flags.isInReg() || IsMCU)
 2943   if (Flags.isInReg() || IsMCU)