reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/TargetCallingConv.h

  177       VT = vt.getSimpleVT();

lib/CodeGen/CallingConvLower.cpp

   91     MVT ArgVT = Ins[i].VT;
  166     MVT VT = Ins[i].VT;

lib/CodeGen/SelectionDAG/FastISel.cpp

 1158       MyFlags.VT = RegisterVT;

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 9075         MyFlags.VT = RegisterVT;
 9100         MyFlags.VT = getPointerTy(DL);
 9284     assert(EVT(CLI.Ins[i].VT) == InVals[i].getValueType() &&
 9741       assert(EVT(Ins[i].VT) == InVals[i].getValueType() &&

lib/Target/AArch64/AArch64ISelLowering.cpp

 3158     MVT ValVT = Ins[i].VT;
 3912         assert(!Ins.empty() && Ins[0].VT == MVT::i64 &&
 4084       return In.VT.isScalableVector();

lib/Target/AMDGPU/AMDGPUISelLowering.cpp

 1103       InVals.push_back(DAG.getUNDEF(CLI.Ins[I].VT));

lib/Target/AMDGPU/R600ISelLowering.cpp

 1597     EVT VT = In.VT;

lib/Target/AMDGPU/SIISelLowering.cpp

 1572     assert((!Arg->VT.isVector() || Arg->VT.getScalarSizeInBits() == 16) &&
 1572     assert((!Arg->VT.isVector() || Arg->VT.getScalarSizeInBits() == 16) &&
 1585           assert((!Arg->VT.isVector() ||
 1586                   Arg->VT.getScalarSizeInBits() == 16) &&
 2124       InVals.push_back(DAG.getUNDEF(Arg.VT));
 2132       VT = Ins[i].VT;
 2687         InVals.push_back(DAG.getUNDEF(CLI.Ins[I].VT));

lib/Target/ARM/ARMISelLowering.cpp

 2186         assert(!Ins.empty() && Ins[0].VT == MVT::i32 &&

lib/Target/AVR/AVRISelLowering.cpp

  975     MVT LocVT = (IsCall) ? (*Outs)[pos].VT : (*Ins)[pos].VT;

lib/Target/BPF/BPFISelLowering.cpp

  467       InVals.push_back(DAG.getConstant(0, DL, Ins[i].VT));
  468     return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InFlag).getValue(1);

lib/Target/MSP430/MSP430ISelLowering.cpp

  483     MVT ArgVT = Args[ValNo].VT;

lib/Target/Mips/MipsCallLowering.cpp

  402         Arguments[i].VT, Arguments[i].ArgVT, Arguments[i].Flags);

lib/Target/NVPTX/NVPTXISelLowering.cpp

 1785       EVT EltType = Ins[i].VT;
 1836             ProxyRegTruncates.push_back(Optional<MVT>(Ins[VecIdx + j].VT));
 2525           InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
 2536           InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
 2543       InVals.push_back(DAG.getNode(ISD::UNDEF, dl, Ins[InsIdx].VT));
 2609             if (Ins[InsIdx].VT.isInteger() &&
 2610                 Ins[InsIdx].VT.getSizeInBits() > LoadVT.getSizeInBits()) {
 2613               Elt = DAG.getNode(Extend, dl, Ins[InsIdx].VT, Elt);
 2636     assert(ObjectVT == Ins[InsIdx].VT &&

lib/Target/PowerPC/PPCISelLowering.cpp

 3741     if (CalculateStackSlotUsed(Ins[i].VT, Ins[i].ArgVT, Ins[i].Flags,
 3761     EVT ObjectVT = Ins[ArgNo].VT;
 4155       EVT ObjectVT = Ins[ArgNo].VT;
 4205     EVT ObjectVT = Ins[ArgNo].VT;
 4226       MinReservedArea += CalculateStackSlotSize(Ins[ArgNo].VT,

lib/Target/RISCV/RISCVISelLowering.cpp

 1625     MVT ArgVT = Ins[i].VT;

lib/Target/Sparc/SparcISelLowering.cpp

 1295   if (CLI.Ins.size() == 1 && CLI.Ins[0].VT == MVT::f32 && !CLI.CS)

lib/Target/SystemZ/SystemZISelLowering.cpp

 1229     VerifyVectorType(Ins[i].VT, Ins[i].ArgVT);

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  827     InTys.push_back(In.VT);
  914     InVals.push_back(In.Used ? DAG.getNode(WebAssemblyISD::ARGUMENT, DL, In.VT,
  917                              : DAG.getUNDEF(In.VT));
  920     MFI->addParam(In.VT);