reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 9504       LN00->getExtensionType() != ISD::ZEXTLOAD && LN00->isUnindexed()) {
 9817         LN00->getExtensionType() != ISD::SEXTLOAD && LN00->isUnindexed()) {
14100   if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) {
14114   if (LD->isUnindexed()) {
16132       ST->isUnindexed()) {
16151   if (Value.isUndef() && ST->isUnindexed())
16155   if (OptLevel != CodeGenOpt::None && ST->isUnindexed()) {
16178   if (ST->isUnindexed()) {
16190   if (ST->isTruncatingStore() && ST->isUnindexed() &&
16224         ST->isUnindexed() && ST->isSimple() &&
16235     if (ST->isUnindexed() && ST->isSimple() &&
16236         ST1->isUnindexed() && ST1->isSimple()) {
16292       && Value.getNode()->hasOneUse() && ST->isUnindexed() &&

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  359   assert(N->isUnindexed() && "Indexed vector load?");
  769   assert(N->isUnindexed() && "Indexed store of one-element vector?");
 2480   assert(N->isUnindexed() && "Indexed store of vector?");

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 3247       if (Lod->isSimple() && Lod->isUnindexed()) {

lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

 1151   if (LD->isUnindexed())

lib/Target/ARM/ARMISelDAGToDAG.cpp

 2940     if (Subtarget->isThumb1Only() && ST->isUnindexed()) {

lib/Target/ARM/ARMISelLowering.cpp

 8936   assert(LD->isUnindexed() && "Expected a unindexed load");
 8965   assert(ST->isUnindexed() && "Expected a unindexed store");
13223   if (LD && Op.hasOneUse() && LD->isUnindexed() &&
13340   if (!St->isSimple() || St->isTruncatingStore() || !St->isUnindexed())

lib/Target/Hexagon/HexagonISelLowering.cpp

 2672   if (!LN->isUnindexed())

lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

 1477   assert(BN->isUnindexed());

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

 4955         if (LD->isUnindexed() && LD->hasOneUse() && Op1.hasOneUse() &&

lib/Target/PowerPC/PPCISelLowering.cpp

 9774   assert(LN->isUnindexed() && "Indexed v4i1 loads are not supported");
 9861   assert(SN->isUnindexed() && "Indexed v4i1 stores are not supported");
13435     if (cast<StoreSDNode>(N)->isUnindexed() && Opcode == ISD::BSWAP &&
13625     if (LD->isUnindexed() && VT.isVector() &&

lib/Target/SystemZ/SystemZISelLowering.cpp

 4570   if (Op.getOpcode() == ISD::LOAD && cast<LoadSDNode>(Op)->isUnindexed())