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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 1680 SDNode *CSENode = DAG.getNodeIfExists(N->getOpcode(), N->getVTList(), Ops,
2484 return DAG.getNode(ISD::ADDCARRY, DL, N1->getVTList(),
2512 return DAG.getNode(ISD::ADDC, DL, N->getVTList(), N1, N0);
2604 return DAG.getNode(N->getOpcode(), DL, N->getVTList(), N1, N0);
2618 SDValue Sub = DAG.getNode(ISD::USUBO, DL, N->getVTList(),
2645 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0, Y,
2652 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0,
2667 return DAG.getNode(ISD::ADDE, SDLoc(N), N->getVTList(),
2672 return DAG.getNode(ISD::ADDC, SDLoc(N), N->getVTList(), N0, N1);
2687 return DAG.getNode(ISD::ADDCARRY, DL, N->getVTList(), N1, N0, CarryIn);
2693 return DAG.getNode(ISD::UADDO, DL, N->getVTList(), N0, N1);
2767 SDValue NewY = DAG.getNode(ISD::ADDCARRY, DL, Carry0->getVTList(), A, B, Z);
2769 return DAG.getNode(ISD::ADDCARRY, DL, N->getVTList(), X,
2809 SDValue Sub = DAG.getNode(ISD::SUBCARRY, DL, N->getVTList(), N1,
2823 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(),
3250 return DAG.getNode(ISD::SADDO, DL, N->getVTList(), N0,
3273 return DAG.getNode(ISD::SUBC, SDLoc(N), N->getVTList(), N0, N1);
3287 return DAG.getNode(ISD::USUBO, SDLoc(N), N->getVTList(), N0, N1);
3664 if (SDNode *RemNode = DAG.getNodeIfExists(ISD::SREM, N->getVTList(),
3802 if (SDNode *RemNode = DAG.getNodeIfExists(ISD::UREM, N->getVTList(),
3932 if (SDNode *DivNode = DAG.getNodeIfExists(DivOpcode, N->getVTList(),
4188 return DAG.getNode(N->getOpcode(), DL, N->getVTList(), N1, N0);
4199 N->getVTList(), N0, N0);
8875 return DAG.getNode(ISD::SETCC, SDLoc(N), N->getVTList(), LHS, RHS, Cond);
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1101 NewVal = DAG.getNode(ISD::TRAP, SDLoc(Node), Node->getVTList(),
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 4506 SDValue Res = DAG.getMaskedGather(MG->getVTList(), MG->getMemoryVT(), dl, Ops,
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 643 AddNodeIDValueTypes(ID, N->getVTList());
942 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
962 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
980 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
lib/CodeGen/SelectionDAG/TargetLowering.cpp 7113 SDValue NodeCarry = DAG.getNode(OpcCarry, dl, Node->getVTList(),
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 597 return CurDAG->MorphNodeTo(N, N->getOpcode(), N->getVTList(), Ops);
711 CurDAG->SelectNodeTo(N, AMDGPU::REG_SEQUENCE, N->getVTList(), RegSeqArgs);
1051 N, Opc, N->getVTList(),
1063 N, Opc, N->getVTList(),
1079 CurDAG->SelectNodeTo(N, AMDGPU::V_FMA_F32, N->getVTList(), Ops);
1092 CurDAG->SelectNodeTo(N, AMDGPU::V_MUL_F32_e64, N->getVTList(), Ops);
1107 CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
1136 CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
1149 CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2159 CmpSwap = CurDAG->getMachineNode(Opcode, SL, Mem->getVTList(), Ops);
2174 CmpSwap = CurDAG->getMachineNode(Opcode, SL, Mem->getVTList(), Ops);
2231 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2319 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops);
2357 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), {Src});
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 2785 return DAG.getNode(NewOpcode, SDLoc(Node24), Node24->getVTList(),
lib/Target/AMDGPU/R600ISelLowering.cpp 1310 Op->getVTList(), Args, MemVT,
1964 return DAG.getNode(ISD::BITCAST, DL, N->getVTList(),
2034 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, N->getVTList(), NewArgs);
2063 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, N->getVTList(), NewArgs);
2267 return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
2273 return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
2310 return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
lib/Target/AMDGPU/SIISelLowering.cpp 4168 return getMemIntrinsicNode(Opc, DL, M->getVTList(), Ops, IntVT,
4503 SDValue NewBR = DAG.getNode(ISD::BR, DL, BR->getVTList(), Ops);
5988 return DAG.getNode(AMDGPUISD::DIV_SCALE, DL, Op->getVTList(), Src0,
6194 M->getVTList(), Ops, M->getMemoryVT(),
6238 return DAG.getMemIntrinsicNode(Opc, SDLoc(Op), M->getVTList(), Ops,
6282 return getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, IntVT,
6353 Op->getVTList(), Ops, LoadVT, M->getMemOperand(),
6377 Op->getVTList(), Ops, LoadVT, M->getMemOperand(),
6401 Op->getVTList(), Ops, LoadVT, M->getMemOperand(),
6474 return DAG.getMemIntrinsicNode(Opcode, DL, Op->getVTList(), Ops, VT,
6548 return DAG.getMemIntrinsicNode(Opcode, DL, Op->getVTList(), Ops, VT,
6623 return DAG.getMemIntrinsicNode(Opcode, DL, Op->getVTList(), Ops, VT,
6652 Op->getVTList(), Ops, VT, M->getMemOperand());
6673 Op->getVTList(), Ops, VT, M->getMemOperand());
6695 Op->getVTList(), Ops, VT, M->getMemOperand());
6794 return DAG.getNode(Opc, DL, Op->getVTList(), Ops);
6819 return DAG.getNode(Opc, DL, Op->getVTList(), Ops);
6858 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops,
6883 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops,
6908 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops,
6949 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops,
6993 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops,
7040 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops,
7071 return DAG.getMemIntrinsicNode(Opcode, DL, Op->getVTList(), Ops, VT,
7087 return DAG.getMemIntrinsicNode(Opcode, DL, Op->getVTList(), Ops, VT,
7226 return DAG.getMemIntrinsicNode(Opc, DL, M->getVTList(), OpsRef, VDataType,
7995 return DAG.getMemIntrinsicNode(AMDGPUISD::ATOMIC_CMP_SWAP, DL, Op->getVTList(),
9551 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), RHS->getVTList(), Args);
9575 return DAG.getNode(ISD::SUBCARRY, SDLoc(N), LHS->getVTList(), Args);
9600 return DAG.getNode(Opc, SDLoc(N), N->getVTList(), Args);
10357 return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
10375 return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
lib/Target/ARM/ARMISelDAGToDAG.cpp 2398 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops));
2423 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops));
2457 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops));
3460 CurDAG->MorphNodeTo(N, ARMISD::CMOV, N->getVTList(), Ops);
lib/Target/ARM/ARMISelLowering.cpp 8722 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, Carry);
11489 return DAG.getNode(Opcode, DL, N->getVTList(), N->getOperand(0), RHS);
11515 return DAG.getNode(Opcode, DL, N->getVTList(),
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp 764 SDNode *C = CurDAG->getMachineNode(OpcCarry, SDLoc(N), N->getVTList(),
lib/Target/Hexagon/HexagonISelLowering.cpp 2748 SDVTList VTs = Op.getNode()->getVTList();
2784 return DAG.getNode(HexagonISD::ADDC, dl, Op.getNode()->getVTList(),
2788 SDValue SubC = DAG.getNode(HexagonISD::SUBC, dl, Op.getNode()->getVTList(),
lib/Target/Mips/MipsSEISelLowering.cpp 516 Op0->getVTList(),
925 Op0Op0->getVTList(),
lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp 1095 LD = CurDAG->getMachineNode(Opcode.getValue(), DL, N->getVTList(), Ops);
1122 LD = CurDAG->getMachineNode(Opcode.getValue(), DL, N->getVTList(), Ops);
1172 LD = CurDAG->getMachineNode(Opcode.getValue(), DL, N->getVTList(), Ops);
1220 LD = CurDAG->getMachineNode(Opcode.getValue(), DL, N->getVTList(), Ops);
2860 ReplaceNode(N, CurDAG->getMachineNode(Opc, SDLoc(N), N->getVTList(), Ops));
3369 ReplaceNode(N, CurDAG->getMachineNode(Opc, SDLoc(N), N->getVTList(), Ops));
3576 ReplaceNode(N, CurDAG->getMachineNode(Opc, DL, N->getVTList(), Ops));
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 662 SDVTList VTs = ST->getVTList();
704 SDVTList VTs = LD->getVTList();
6323 ISR.getNode()->getVTList(), ReplOpOps);
6335 SDVTList VTs = PN->getVTList();
lib/Target/SystemZ/SystemZISelLowering.cpp 1924 SDValue Intr = DAG.getNode(Opcode, SDLoc(Op), Op->getVTList(), Ops);
3477 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC);
3543 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC);
3906 Node->getVTList(), Ops,
3942 return DAG.getNode(ISD::MERGE_VALUES, SDLoc(Op), Op->getVTList(),
lib/Target/X86/X86ISelLowering.cpp21173 return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(), Value, SetCC);
24009 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC,
24030 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC,
24055 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), Result, isValid,
24130 return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(),
26723 return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(),
27180 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(),
27187 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(),
27195 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(),
27276 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC);
37543 DAG.getNode(X86ISD::SUB, SDLoc(CarryOp1), CarryOp1->getVTList(),
42986 return DAG.getMaskedGather(Gather->getVTList(),
42994 return DAG.getMaskedScatter(Scatter->getVTList(),
43015 return DAG.getMaskedGather(Gather->getVTList(),
43023 return DAG.getMaskedScatter(Scatter->getVTList(),
43042 return DAG.getMaskedGather(Gather->getVTList(),
43050 return DAG.getMaskedScatter(Scatter->getVTList(),
43094 return DAG.getNode(X86ISD::BRCOND, DL, N->getVTList(), N->getOperand(0),
43492 return DAG.getNode(X86ISD::SBB, SDLoc(N), N->getVTList(), Op0.getOperand(0),
43591 X86ISD::SUB, SDLoc(EFLAGS), EFLAGS.getNode()->getVTList(),
43621 EFLAGS.getNode()->getVTList(),