reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 6916         return DAG.getSelectCC(SDLoc(N0), LHS, RHS, N0.getOperand(2),
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 3103     Tmp1 = DAG.getSelectCC(dl, Tmp1, Tmp2, Tmp1, Tmp2, Pred);
 3426       Tmp1 = DAG.getSelectCC(dl, Tmp1.getOperand(0), Tmp1.getOperand(1),
 3430       Tmp1 = DAG.getSelectCC(dl, Tmp1,
 3582       Tmp1 = DAG.getSelectCC(dl, Tmp1, Tmp2, Tmp4, Tmp3, InvCC);
 3592         Tmp1 = DAG.getSelectCC(dl, Tmp2, Tmp1, Tmp4, Tmp3, SwapInvCC);
lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
 1203   Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
 1612   Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
lib/CodeGen/SelectionDAG/TargetLowering.cpp
 5756     Next = DAG.getSelectCC(dl, LH, Zero, NextSub, Next, ISD::SETLT);
 5760     Next = DAG.getSelectCC(dl, RH, Zero, NextSub, Next, ISD::SETLT);
 5929   R = DAG.getSelectCC(
 5944   Result = DAG.getSelectCC(dl, Exponent, DAG.getConstant(0, dl, IntVT),
 7060     Result = DAG.getSelectCC(dl, Hi, LowMask,
 7080     SDValue ResultIfOverflow = DAG.getSelectCC(dl, Hi, Zero, SatMin, SatMax,
 7092   Result = DAG.getSelectCC(dl, Hi, LowMask, SatMax, Result, ISD::SETGT);
 7098   Result = DAG.getSelectCC(dl, Hi, HighMask, SatMin, Result, ISD::SETLT);
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
 1744     SDValue C1 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, MinusOne, Zero,
 1746     SDValue C2 = DAG.getSelectCC(DL, Sub1_Lo, RHS_Lo, MinusOne, Zero,
 1748     SDValue C3 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, C2, C1, ISD::SETEQ);
 1766     SDValue C4 = DAG.getSelectCC(DL, Sub2_Hi, RHS_Hi, MinusOne, Zero,
 1768     SDValue C5 = DAG.getSelectCC(DL, Sub2_Lo, RHS_Lo, MinusOne, Zero,
 1770     SDValue C6 = DAG.getSelectCC(DL, Sub2_Hi, RHS_Hi, C5, C4, ISD::SETEQ);
 1787     SDValue Sel1 = DAG.getSelectCC(DL, C6, Zero, Add4, Add3, ISD::SETNE);
 1788     SDValue Div  = DAG.getSelectCC(DL, C3, Zero, Sel1, Mulhi3, ISD::SETNE);
 1790     SDValue Sel2 = DAG.getSelectCC(DL, C6, Zero, Sub3, Sub2, ISD::SETNE);
 1791     SDValue Rem  = DAG.getSelectCC(DL, C3, Zero, Sel2, Sub1, ISD::SETNE);
 1804   SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, Zero, REM_Part, LHS_Hi, ISD::SETEQ);
 1808   SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, Zero, DIV_Part, Zero, ISD::SETEQ);
 1827     SDValue realBIT = DAG.getSelectCC(DL, REM, RHS, BIT, Zero, ISD::SETUGE);
 1833     REM = DAG.getSelectCC(DL, REM, RHS, REM_sub, REM, ISD::SETUGE);
 1876   SDValue ABS_RCP_LO = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT),
 1890   SDValue Tmp0 = DAG.getSelectCC(DL, RCP_HI, DAG.getConstant(0, DL, VT),
 1903   SDValue Remainder_GE_Den = DAG.getSelectCC(DL, Remainder, Den,
 1908   SDValue Remainder_GE_Zero = DAG.getSelectCC(DL, Num,
 1928   SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, DL, VT),
 1932   Div = DAG.getSelectCC(DL, Remainder_GE_Zero, DAG.getConstant(0, DL, VT),
 1944   SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, DL, VT),
 1948   Rem = DAG.getSelectCC(DL, Remainder_GE_Zero, DAG.getConstant(0, DL, VT),
 1990   SDValue LHSign = DAG.getSelectCC(DL, LHS, Zero, NegOne, Zero, ISD::SETLT);
 1991   SDValue RHSign = DAG.getSelectCC(DL, RHS, Zero, NegOne, Zero, ISD::SETLT);
 2624   SDValue Lo40Set = DAG.getSelectCC(DL, MaskedSig, Zero, Zero, One, ISD::SETEQ);
 2629       DAG.getSelectCC(DL, M, Zero, DAG.getConstant(0x0200, DL, MVT::i32),
 2649   SDValue D1 = DAG.getSelectCC(DL, D0, SigSetHigh, One, Zero, ISD::SETNE);
 2652   SDValue V = DAG.getSelectCC(DL, E, One, D, N, ISD::SETLT);
 2657   SDValue V0 = DAG.getSelectCC(DL, VLow3, DAG.getConstant(3, DL, MVT::i32),
 2659   SDValue V1 = DAG.getSelectCC(DL, VLow3, DAG.getConstant(5, DL, MVT::i32),
 2664   V = DAG.getSelectCC(DL, E, DAG.getConstant(30, DL, MVT::i32),
 2666   V = DAG.getSelectCC(DL, E, DAG.getConstant(1039, DL, MVT::i32),
lib/Target/AMDGPU/R600ISelLowering.cpp
  819   Hi = DAG.getSelectCC(DL, Shift, Width, HiSmall, HiBig, ISD::SETULT);
  820   Lo = DAG.getSelectCC(DL, Shift, Width, LoSmall, LoBig, ISD::SETULT);
  857   Hi = DAG.getSelectCC(DL, Shift, Width, HiSmall, HiBig, ISD::SETULT);
  858   Lo = DAG.getSelectCC(DL, Shift, Width, LoSmall, LoBig, ISD::SETULT);
 2006         return DAG.getSelectCC(DL,
lib/Target/AMDGPU/SIISelLowering.cpp
 9327         V = DAG.getSelectCC(SL, Idx, IC, Elt, V, ISD::SETEQ);
 9399     SDValue V = DAG.getSelectCC(SL, Idx, IC, Ins, Elt, ISD::SETEQ);
lib/Target/ARM/ARMISelLowering.cpp
 4605   return DAG.getSelectCC(dl, Cond,
lib/Target/NVPTX/NVPTXISelLowering.cpp
 1952   return DAG.getSelectCC(dl, Index, DAG.getIntPtrConstant(0, dl), E0, E1,
lib/Target/PowerPC/PPCISelLowering.cpp
 7479         return DAG.getSelectCC(dl, Op.getOperand(0), Tmp, True, False,
 8098   SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, dl, AmtVT),
lib/Target/X86/X86ISelLowering.cpp
 9375       return DAG.getSelectCC(
 9407         return DAG.getSelectCC(DL, Idx, DAG.getConstant(15, DL, VT),
 9445       SDValue Res = DAG.getSelectCC(
 9481       SDValue Res = DAG.getSelectCC(