reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/CodeGenPrepare.cpp

 1333   if (!TLI->shouldFormOverflowOp(ISD::USUBO,

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1504   case ISD::USUBO:              return visitSUBO(N);
 2382       V.getOpcode() != ISD::UADDO && V.getOpcode() != ISD::USUBO)
 2618       SDValue Sub = DAG.getNode(ISD::USUBO, DL, N->getVTList(),
 3286         TLI.isOperationLegalOrCustom(ISD::USUBO, N->getValueType(0)))
 3287       return DAG.getNode(ISD::USUBO, SDLoc(N), N->getVTList(), N0, N1);

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 3394   case ISD::USUBO: {

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

  142   case ISD::USUBO:       Res = PromoteIntRes_UADDSUBO(N, ResNo); break;
 1782   case ISD::USUBO: ExpandIntRes_UADDSUBO(N, Lo, Hi); break;
 2147       Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps);
 2180                                    ISD::UADDO : ISD::USUBO,
 2194       Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps);
 2314     case ISD::USUBO:
 3772     SDValue LowCmp = DAG.getNode(ISD::USUBO, dl, VTList, LHSLo, RHSLo);

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  444   case ISD::USUBO:
  818   case ISD::USUBO:

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

  180   case ISD::USUBO:
  995   case ISD::USUBO:
 2806   case ISD::USUBO:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 3033   case ISD::USUBO:
 3639   case ISD::USUBO:
 9183           Opcode == ISD::USUBO || Opcode == ISD::SSUBO ||

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

 6525     case Intrinsic::usub_with_overflow: Op = ISD::USUBO; break;

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  291   case ISD::USUBO:                      return "usubo";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 6916     OverflowOp = ISD::USUBO;

lib/CodeGen/TargetLoweringBase.cpp

  662     setOperationAction(ISD::USUBO, VT, Expand);

lib/Target/AArch64/AArch64ISelLowering.cpp

  342   setOperationAction(ISD::USUBO, MVT::i32, Custom);
  343   setOperationAction(ISD::USUBO, MVT::i64, Custom);
 2125   case ISD::USUBO:
 2229            Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
 3004   case ISD::USUBO:

lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

  757   case ISD::USUBO: {

lib/Target/AMDGPU/R600ISelLowering.cpp

  178     setOperationAction(ISD::USUBO, MVT::i32, Custom);
  484   case ISD::USUBO: return LowerUADDSUBO(Op, DAG, ISD::SUB, AMDGPUISD::BORROW);

lib/Target/AMDGPU/SIISelLowering.cpp

  233   setOperationAction(ISD::USUBO, MVT::i32, Legal);

lib/Target/ARM/ARMISelLowering.cpp

 1020   setOperationAction(ISD::USUBO, MVT::i32, Custom);
 4395   case ISD::USUBO:
 4497   case ISD::USUBO: {
 4550        Opc == ISD::USUBO)) {
 5185        Opc == ISD::USUBO || OptimizeMul)) {
 5236        Opc == ISD::USUBO || OptimizeMul) &&
 9215   case ISD::USUBO:
14331         SDValue Neg = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, Sub);
14391     SDValue Subc = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, TrueVal);

lib/Target/Hexagon/HexagonISelLowering.cpp

 1343     setOperationAction(ISD::USUBO,    VT, Custom);
 1422     ISD::UADDO,   ISD::SSUBO,   ISD::USUBO,   ISD::SMUL_LOHI, ISD::UMUL_LOHI,
 2766     if (Opc == ISD::USUBO) {
 2855     case ISD::USUBO:                return LowerUAddSubO(Op, DAG);

lib/Target/SystemZ/SystemZISelLowering.cpp

  172       setOperationAction(ISD::USUBO, VT, Custom);
 3463   case ISD::USUBO:
 3489   return Carry.getOpcode() == ISD::USUBO;
 4969   case ISD::USUBO:

lib/Target/X86/X86ISelLowering.cpp

 1790     setOperationAction(ISD::USUBO, VT, Custom);
20108   case ISD::USUBO: {
21137   case ISD::USUBO:
21427   } else if (CondOpcode == ISD::USUBO || CondOpcode == ISD::SSUBO ||
21982          Cond.getOperand(0).getOpcode() == ISD::USUBO ||
22035       CondOpcode == ISD::USUBO || CondOpcode == ISD::SSUBO ||
27757   case ISD::USUBO: