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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc92581 /*210764*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::TargetConstantPool),// ->210777
93340 /*212361*/ /*SwitchOpcode*/ 66, TARGET_VAL(ISD::TargetConstantPool),// ->212430
93344 /*212367*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
93348 /*212373*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
93352 /*212379*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
93801 /*213318*/ /*SwitchOpcode*/ 18, TARGET_VAL(ISD::TargetConstantPool),// ->213339
93806 /*213325*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
96177 /*217802*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::TargetConstantPool),// ->217815
96216 /*217874*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::TargetConstantPool),// ->217887
gen/lib/Target/ARM/ARMGenDAGISel.inc25697 /* 55459*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
26883 /* 57989*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
27783 /* 60106*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
33066 /* 72783*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
36411 /* 80160*/ /*SwitchOpcode*/ 59, TARGET_VAL(ISD::TargetConstantPool),// ->80222
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc62120 /*118797*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
62454 /*119527*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
66424 /*127699*/ OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstantPool),
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 342 /* 544*/ /*SwitchOpcode*/ 12, TARGET_VAL(ISD::TargetConstantPool),// ->559
390 /* 634*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::TargetConstantPool),// ->651
442 /* 725*/ /*SwitchOpcode*/ 13, TARGET_VAL(ISD::TargetConstantPool),// ->741
1085 /* 1954*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::TargetConstantPool),// ->1967
1128 /* 2042*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::TargetConstantPool),// ->2059
1168 /* 2118*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::TargetConstantPool),// ->2131
gen/lib/Target/Mips/MipsGenDAGISel.inc15203 /* 28062*/ /*SwitchOpcode*/ 56, TARGET_VAL(ISD::TargetConstantPool),// ->28121
15327 /* 28291*/ /*SwitchOpcode*/ 42, TARGET_VAL(ISD::TargetConstantPool),// ->28336
15382 /* 28394*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::TargetConstantPool),// ->28411
15431 /* 28486*/ /*SwitchOpcode*/ 14, TARGET_VAL(ISD::TargetConstantPool),// ->28503
15561 /* 28724*/ /*SwitchOpcode*/ 57, TARGET_VAL(ISD::TargetConstantPool),// ->28784
15689 /* 28957*/ /*SwitchOpcode*/ 43, TARGET_VAL(ISD::TargetConstantPool),// ->29003
15748 /* 29064*/ /*SwitchOpcode*/ 15, TARGET_VAL(ISD::TargetConstantPool),// ->29082
15802 /* 29161*/ /*SwitchOpcode*/ 15, TARGET_VAL(ISD::TargetConstantPool),// ->29179
22714 /* 42546*/ /*SwitchOpcode*/ 56, TARGET_VAL(ISD::TargetConstantPool),// ->42605
22893 /* 42898*/ /*SwitchOpcode*/ 69, TARGET_VAL(ISD::TargetConstantPool),// ->42970
23117 /* 43334*/ /*SwitchOpcode*/ 41, TARGET_VAL(ISD::TargetConstantPool),// ->43378
23358 /* 43793*/ /*SwitchOpcode*/ 12, TARGET_VAL(ISD::TargetConstantPool),// ->43808
23405 /* 43890*/ /*SwitchOpcode*/ 17, TARGET_VAL(ISD::TargetConstantPool),// ->43910
gen/lib/Target/PowerPC/PPCGenDAGISel.inc20878 /* 52543*/ /*SwitchOpcode*/ 26, TARGET_VAL(ISD::TargetConstantPool),// ->52572
20959 /* 52695*/ /*SwitchOpcode*/ 27, TARGET_VAL(ISD::TargetConstantPool),// ->52725
23766 /* 57981*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::TargetConstantPool),// ->58007
23844 /* 58120*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::TargetConstantPool),// ->58146
27903 /* 67396*/ /*SwitchOpcode*/ 12, TARGET_VAL(ISD::TargetConstantPool),// ->67411
gen/lib/Target/Sparc/SparcGenDAGISel.inc 469 /* 769*/ /*SwitchOpcode*/ 28, TARGET_VAL(ISD::TargetConstantPool),// ->800
527 /* 872*/ /*SwitchOpcode*/ 29, TARGET_VAL(ISD::TargetConstantPool),// ->904
2590 /* 4743*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::TargetConstantPool),// ->4769
2657 /* 4865*/ /*SwitchOpcode*/ 33, TARGET_VAL(ISD::TargetConstantPool),// ->4901
gen/lib/Target/X86/X86GenDAGISel.inc 5964 /* 12769*/ OPC_SwitchOpcode /*6 cases */, 26, TARGET_VAL(ISD::TargetConstantPool),// ->12799
57961 /*122473*/ OPC_SwitchOpcode /*7 cases */, 12, TARGET_VAL(ISD::TargetConstantPool),// ->122489
gen/lib/Target/XCore/XCoreGenDAGISel.inc 340 /* 501*/ /*SwitchOpcode*/ 16, TARGET_VAL(ISD::TargetConstantPool),// ->520
1982 /* 3468*/ /*SwitchOpcode*/ 10, TARGET_VAL(ISD::TargetConstantPool),// ->3481
include/llvm/CodeGen/SelectionDAGNodes.h 1833 : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
1842 : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
1878 N->getOpcode() == ISD::TargetConstantPool;
lib/CodeGen/SelectionDAG/SelectionDAG.cpp 529 case ISD::TargetConstantPool: {
1433 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1459 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 165 case ISD::TargetConstantPool: return "TargetConstantPool";
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp 2763 case ISD::TargetConstantPool:
lib/Target/ARM/ARMISelDAGToDAG.cpp 1100 N.getOperand(0).getOpcode() != ISD::TargetConstantPool &&
1236 if (Base.getOpcode() == ISD::TargetConstantPool)
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 951 if (Addr.getOperand(0).getOpcode() == ISD::TargetConstantPool)
lib/Target/PowerPC/PPCISelLowering.cpp 2397 Disp.getOpcode() == ISD::TargetConstantPool ||