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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1195 case ISD::SRA_PARTS:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 3176 PartsOpc = ISD::SRA_PARTS;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 298 case ISD::SRA_PARTS: return "sra_parts";
lib/Target/AArch64/AArch64ISelLowering.cpp 221 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom);
3047 case ISD::SRA_PARTS:
5604 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL;
5606 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS);
lib/Target/AMDGPU/R600ISelLowering.cpp 219 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom);
481 case ISD::SRA_PARTS:
835 const bool SRA = Op.getOpcode() == ISD::SRA_PARTS;
lib/Target/AMDGPU/SIISelLowering.cpp 239 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
lib/Target/ARM/ARMISelLowering.cpp 1047 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom);
1062 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
5800 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL;
5802 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS);
9186 case ISD::SRA_PARTS: return LowerShiftRightParts(Op, DAG);
lib/Target/AVR/AVRISelLowering.cpp 88 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
lib/Target/BPF/BPFISelLowering.cpp 98 setOperationAction(ISD::SRA_PARTS, VT, Expand);
lib/Target/Hexagon/HexagonISelLowering.cpp 1376 ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
lib/Target/Lanai/LanaiISelLowering.cpp 123 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
lib/Target/MSP430/MSP430ISelLowering.cpp 111 setOperationAction(ISD::SRA_PARTS, MVT::i8, Expand);
112 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expand);
lib/Target/Mips/MipsISelLowering.cpp 379 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom);
385 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom);
1238 case ISD::SRA_PARTS: return lowerShiftRightParts(Op, DAG, true);
lib/Target/NVPTX/NVPTXISelLowering.cpp 411 setOperationAction(ISD::SRA_PARTS, MVT::i32 , Custom);
414 setOperationAction(ISD::SRA_PARTS, MVT::i64 , Custom);
1964 assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS);
1972 unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL;
2196 case ISD::SRA_PARTS:
lib/Target/PowerPC/PPCISelLowering.cpp 542 setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom);
547 setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom);
10152 case ISD::SRA_PARTS: return LowerSRA_PARTS(Op, DAG);
lib/Target/RISCV/RISCVISelLowering.cpp 134 setOperationAction(ISD::SRA_PARTS, XLenVT, Custom);
391 case ISD::SRA_PARTS:
lib/Target/Sparc/SparcISelLowering.cpp 1644 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);
1678 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
lib/Target/SystemZ/SystemZISelLowering.cpp 273 setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 113 ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS,
lib/Target/X86/X86ISelLowering.cpp 456 setOperationAction(ISD::SRA_PARTS, VT, Custom);
18234 bool isSRA = Op.getOpcode() == ISD::SRA_PARTS;
27689 case ISD::SRA_PARTS:
lib/Target/XCore/XCoreISelLowering.cpp 102 setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand);