reference, declarationdefinition
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reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 1196     case ISD::SHL_PARTS: {
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 3171     PartsOpc = ISD::SHL_PARTS;
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  297   case ISD::SHL_PARTS:                  return "shl_parts";
lib/Target/AArch64/AArch64ISelLowering.cpp
  220   setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom);
 3044   case ISD::SHL_PARTS:
 5662   assert(Op.getOpcode() == ISD::SHL_PARTS);
lib/Target/AMDGPU/R600ISelLowering.cpp
  217   setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom);
  480   case ISD::SHL_PARTS: return LowerSHLParts(Op, DAG);
lib/Target/AMDGPU/SIISelLowering.cpp
  238   setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
lib/Target/ARM/ARMISelLowering.cpp
 1046   setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom);
 1061     setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
 5845   assert(Op.getOpcode() == ISD::SHL_PARTS);
 9184   case ISD::SHL_PARTS:     return LowerShiftLeftParts(Op, DAG);
lib/Target/AVR/AVRISelLowering.cpp
   87   setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
lib/Target/BPF/BPFISelLowering.cpp
   96     setOperationAction(ISD::SHL_PARTS, VT, Expand);
lib/Target/Hexagon/HexagonISelLowering.cpp
 1376         ISD::SHL_PARTS, ISD::SRA_PARTS, ISD::SRL_PARTS,
lib/Target/Lanai/LanaiISelLowering.cpp
  121   setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom);
  194   case ISD::SHL_PARTS:
lib/Target/MSP430/MSP430ISelLowering.cpp
  107   setOperationAction(ISD::SHL_PARTS,        MVT::i8,    Expand);
  108   setOperationAction(ISD::SHL_PARTS,        MVT::i16,   Expand);
lib/Target/Mips/MipsISelLowering.cpp
  378     setOperationAction(ISD::SHL_PARTS,          MVT::i64,   Custom);
  384     setOperationAction(ISD::SHL_PARTS,          MVT::i32,   Custom);
 1237   case ISD::SHL_PARTS:          return lowerShiftLeftParts(Op, DAG);
lib/Target/NVPTX/NVPTXISelLowering.cpp
  410   setOperationAction(ISD::SHL_PARTS, MVT::i32  , Custom);
  413   setOperationAction(ISD::SHL_PARTS, MVT::i64  , Custom);
 2025   assert(Op.getOpcode() == ISD::SHL_PARTS);
 2194   case ISD::SHL_PARTS:
lib/Target/PowerPC/PPCISelLowering.cpp
  541     setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom);
  546     setOperationAction(ISD::SHL_PARTS, MVT::i32, Custom);
10150   case ISD::SHL_PARTS:          return LowerSHL_PARTS(Op, DAG);
lib/Target/RISCV/RISCVISelLowering.cpp
  132   setOperationAction(ISD::SHL_PARTS, XLenVT, Custom);
  389   case ISD::SHL_PARTS:
lib/Target/Sparc/SparcISelLowering.cpp
 1643   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
 1677     setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
lib/Target/SystemZ/SystemZISelLowering.cpp
  272   setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  113         ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, ISD::SRA_PARTS,
lib/Target/X86/X86ISelLowering.cpp
  455     setOperationAction(ISD::SHL_PARTS, VT, Custom);
18248   if (Op.getOpcode() == ISD::SHL_PARTS) {
18265   if (Op.getOpcode() == ISD::SHL_PARTS) {
27688   case ISD::SHL_PARTS:
lib/Target/XCore/XCoreISelLowering.cpp
  101   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);