reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1492   case ISD::MERGE_VALUES:       return visitMERGE_VALUES(N);
10852   if (Elt.getOpcode() != ISD::MERGE_VALUES)

lib/CodeGen/SelectionDAG/InstrEmitter.cpp

  990   case ISD::MERGE_VALUES:

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 1059   case ISD::MERGE_VALUES:
 2800   case ISD::MERGE_VALUES:

lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

   61     case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
 1132   case ISD::MERGE_VALUES:       ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

   55   case ISD::MERGE_VALUES:Res = PromoteIntRes_MERGE_VALUES(N, ResNo); break;
 1675   case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;

lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

  748     if (Scalarized->getOpcode() == ISD::MERGE_VALUES) {

lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

   49   case ISD::MERGE_VALUES:      R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
  844   case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
 2708   case ISD::MERGE_VALUES:      Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;

lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

  706   case ISD::MERGE_VALUES:

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 4461   case ISD::MERGE_VALUES:
 6561   return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);

lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

  883   return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(ValueVTs), Values);
 2902   SDValue Res = DAG.getNode(ISD::MERGE_VALUES, dl,
 3374   setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
 3790   setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
 3830   setValue(&I, DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
 4122   setValue(&I, DAG.getNode(ISD::MERGE_VALUES, dl,
 8488         if (Val.getOpcode() == ISD::MERGE_VALUES) {
 8504     SDValue V = DAG.getNode(ISD::MERGE_VALUES, getCurSDLoc(),
 9352   SDValue Res = CLI.DAG.getNode(ISD::MERGE_VALUES, CLI.DL,

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  173   case ISD::MERGE_VALUES:               return "merge_values";

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 6478         if (Scalarized->getOpcode() == ISD::MERGE_VALUES)
 7281     assert(Ret.getOpcode() == ISD::MERGE_VALUES &&

lib/CodeGen/TargetLoweringBase.cpp

 1641   case ExtractValue:   return ISD::MERGE_VALUES;
 1642   case InsertValue:    return ISD::MERGE_VALUES;

lib/Target/AArch64/AArch64ISelLowering.cpp

 2371   return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow);

lib/Target/AMDGPU/R600ISelLowering.cpp

  822   return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT,VT), Lo, Hi);
  860   return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT,VT), Lo, Hi);
  878   return DAG.getNode(ISD::MERGE_VALUES, DL, DAG.getVTList(VT, VT), Res, OVF);

lib/Target/AMDGPU/SIISelLowering.cpp

 4307       if (Res.getOpcode() == ISD::MERGE_VALUES) {

lib/Target/ARM/ARMISelLowering.cpp

 4448   return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow);
 4509   return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow);
 8722   return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, Carry);
 8796   return DAG.getNode(ISD::MERGE_VALUES, dl, Tys,
15987     return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VT, VT), Values);

lib/Target/PowerPC/PPCISelLowering.cpp

13178     return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VecTy, MVT::Other),

lib/Target/SystemZ/SystemZISelLowering.cpp

 3477   return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC);
 3543   return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, SetCC);
 3942     return DAG.getNode(ISD::MERGE_VALUES, SDLoc(Op), Op->getVTList(),

lib/Target/X86/X86ISelLowering.cpp

21173   return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(), Value, SetCC);
24009       return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC,
24030       return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), SetCC,
24055     return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), Result, isValid,
24130     return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(),
26723   return DAG.getNode(ISD::MERGE_VALUES, DL, Op->getVTList(),
27180       return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(),
27187     return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(),
27195   return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(),
27276   return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC);
27330   return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, SinVal, CosVal);