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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc94998 /*215599*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->215625
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc59609 /*130398*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->130424
gen/lib/Target/ARC/ARCGenDAGISel.inc 460 /* 743*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->769
gen/lib/Target/ARM/ARMGenDAGISel.inc35629 /* 78565*/ /*SwitchOpcode*/ 58, TARGET_VAL(ISD::CALLSEQ_END),// ->78626
gen/lib/Target/AVR/AVRGenDAGISel.inc 519 /* 814*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->840
gen/lib/Target/BPF/BPFGenDAGISel.inc 1360 /* 2345*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->2371
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc65525 /*126102*/ /*SwitchOpcode*/ 26, TARGET_VAL(ISD::CALLSEQ_END),// ->126131
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 287 /* 442*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->468
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 4432 /* 8876*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->8902
gen/lib/Target/Mips/MipsGenDAGISel.inc16414 /* 30433*/ /*SwitchOpcode*/ 22, TARGET_VAL(ISD::CALLSEQ_END),// ->30458
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc54728 /*117677*/ /*SwitchOpcode*/ 22, TARGET_VAL(ISD::CALLSEQ_END),// ->117702
gen/lib/Target/PowerPC/PPCGenDAGISel.inc24017 /* 58425*/ /*SwitchOpcode*/ 22, TARGET_VAL(ISD::CALLSEQ_END),// ->58450
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 6662 /* 12281*/ /*SwitchOpcode*/ 22, TARGET_VAL(ISD::CALLSEQ_END),// ->12306
gen/lib/Target/Sparc/SparcGenDAGISel.inc 1999 /* 3690*/ /*SwitchOpcode*/ 22, TARGET_VAL(ISD::CALLSEQ_END),// ->3715
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc21007 /* 39507*/ /*SwitchOpcode*/ 22, TARGET_VAL(ISD::CALLSEQ_END),// ->39532
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc15189 /* 29737*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->29763
gen/lib/Target/X86/X86GenDAGISel.inc57430 /*121485*/ /*SwitchOpcode*/ 40, TARGET_VAL(ISD::CALLSEQ_END),// ->121528
gen/lib/Target/XCore/XCoreGenDAGISel.inc 1664 /* 2839*/ /*SwitchOpcode*/ 23, TARGET_VAL(ISD::CALLSEQ_END),// ->2865
include/llvm/CodeGen/SelectionDAG.h 885 return getNode(ISD::CALLSEQ_END, DL, NodeTys, Ops);
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 1051 case ISD::CALLSEQ_END:
1269 case ISD::CALLSEQ_END:
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 8799 assert(CallEnd->getOpcode() == ISD::CALLSEQ_END &&
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 352 case ISD::CALLSEQ_END: return "callseq_end";
lib/CodeGen/SelectionDAG/StatepointLowering.cpp 346 assert(CallEnd->getOpcode() == ISD::CALLSEQ_END && "expected!");
lib/Target/AMDGPU/SIISelLowering.cpp10864 case ISD::CALLSEQ_END: