reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

 1587   case ISD::BR_CC:              return visitBR_CC(N);
13310       TLI.isOperationLegalOrCustom(ISD::BR_CC,
13312     return DAG.getNode(ISD::BR_CC, SDLoc(N), MVT::Other,
13441     return DAG.getNode(ISD::BR_CC, SDLoc(N), MVT::Other,

lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

 1027   case ISD::BR_CC: {
 1030     unsigned CompareOperand = Node->getOpcode() == ISD::BR_CC ? 2 : 0;
 3485       Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other,
 3499       Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, Tmp1,
 3625   case ISD::BR_CC: {
 3641       Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1,
 3646       Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1, Tmp4,
 4132   if (Node->getOpcode() == ISD::BR_CC)
 4332   case ISD::BR_CC: {
 4341     Results.push_back(DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0),

lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

  840   case ISD::BR_CC:       Res = SoftenFloatOp_BR_CC(N); break;
 1646   case ISD::BR_CC:      Res = ExpandFloatOp_BR_CC(N); break;

lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

 1160   case ISD::BR_CC:        Res = PromoteIntOp_BR_CC(N, OpNo); break;
 3603   case ISD::BR_CC:             Res = ExpandIntOp_BR_CC(N); break;

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

 7233   case ISD::BR_CC:

lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

  350   case ISD::BR_CC:                      return "br_cc";

lib/Target/AArch64/AArch64ISelLowering.cpp

  202   setOperationAction(ISD::BR_CC, MVT::i32, Custom);
  203   setOperationAction(ISD::BR_CC, MVT::i64, Custom);
  204   setOperationAction(ISD::BR_CC, MVT::f16, Custom);
  205   setOperationAction(ISD::BR_CC, MVT::f32, Custom);
  206   setOperationAction(ISD::BR_CC, MVT::f64, Custom);
  254   setOperationAction(ISD::BR_CC, MVT::f128, Custom);
  400     setOperationAction(ISD::BR_CC,       MVT::f16,  Promote);
  439     setOperationAction(ISD::BR_CC,       MVT::v4f16, Expand);
  466     setOperationAction(ISD::BR_CC,       MVT::v8f16, Expand);
  683     setOperationAction(ISD::BR_CC, MVT::v1f64, Expand);
 2976   case ISD::BR_CC:

lib/Target/AMDGPU/R600ISelLowering.cpp

  146   setOperationAction(ISD::BR_CC, MVT::i32, Expand);
  147   setOperationAction(ISD::BR_CC, MVT::f32, Expand);

lib/Target/AMDGPU/SIISelLowering.cpp

  226   setOperationAction(ISD::BR_CC, MVT::i1, Expand);
  227   setOperationAction(ISD::BR_CC, MVT::i32, Expand);
  228   setOperationAction(ISD::BR_CC, MVT::i64, Expand);
  229   setOperationAction(ISD::BR_CC, MVT::f32, Expand);
  230   setOperationAction(ISD::BR_CC, MVT::f64, Expand);
  463     setOperationAction(ISD::BR_CC, MVT::i16, Expand);
  499     setOperationAction(ISD::BR_CC, MVT::f16, Expand);

lib/Target/ARC/ARCISelLowering.cpp

  117   setOperationAction(ISD::BR_CC, MVT::i32, Custom);
  755   case ISD::BR_CC:

lib/Target/ARM/ARMISelLowering.cpp

  737     setTargetDAGCombine(ISD::BR_CC);
 1290   setOperationAction(ISD::BR_CC,     MVT::i32,   Custom);
 1292       setOperationAction(ISD::BR_CC, MVT::f16,   Custom);
 1293   setOperationAction(ISD::BR_CC,     MVT::f32,   Custom);
 1294   setOperationAction(ISD::BR_CC,     MVT::f64,   Custom);
 9160   case ISD::BR_CC:         return LowerBR_CC(Op, DAG);
14103     assert(N->getOpcode() == ISD::BR_CC && "Expected BRCOND or BR_CC!");
14430   case ISD::BR_CC:      return PerformHWLoopCombine(N, DCI, Subtarget);

lib/Target/AVR/AVRISelLowering.cpp

   96   setOperationAction(ISD::BR_CC, MVT::i8, Custom);
   97   setOperationAction(ISD::BR_CC, MVT::i16, Custom);
   98   setOperationAction(ISD::BR_CC, MVT::i32, Custom);
   99   setOperationAction(ISD::BR_CC, MVT::i64, Custom);
  697   case ISD::BR_CC:

lib/Target/BPF/BPFISelLowering.cpp

   71   setOperationAction(ISD::BR_CC, MVT::i64, Custom);
  108     setOperationAction(ISD::BR_CC, MVT::i32,
  192   case ISD::BR_CC:

lib/Target/Hexagon/HexagonISelLowering.cpp

 1403     setOperationAction(ISD::BR_CC,     VT, Expand);
 1407     setOperationAction(ISD::BR_CC,     VT, Expand);
 1410   setOperationAction(ISD::BR_CC, MVT::Other, Expand);
 1434     ISD::BR_CC,   ISD::SELECT_CC,             ISD::ConstantPool,

lib/Target/Lanai/LanaiISelLowering.cpp

   85   setOperationAction(ISD::BR_CC, MVT::i32, Custom);
  180   case ISD::BR_CC:

lib/Target/MSP430/MSP430ISelLowering.cpp

   85   setOperationAction(ISD::BR_CC,            MVT::i8,    Custom);
   86   setOperationAction(ISD::BR_CC,            MVT::i16,   Custom);
  344   case ISD::BR_CC:            return LowerBR_CC(Op, DAG);

lib/Target/Mips/MipsISelLowering.cpp

  403   setOperationAction(ISD::BR_CC,             MVT::f32,   Expand);
  404   setOperationAction(ISD::BR_CC,             MVT::f64,   Expand);
  405   setOperationAction(ISD::BR_CC,             MVT::i32,   Expand);
  406   setOperationAction(ISD::BR_CC,             MVT::i64,   Expand);

lib/Target/Mips/MipsSEISelLowering.cpp

  128     setOperationAction(ISD::BR_CC, MVT::f16, Promote);

lib/Target/NVPTX/NVPTXISelLowering.cpp

  399     setOperationAction(ISD::BR_CC, VT, Expand);

lib/Target/PowerPC/PPCISelDAGToDAG.cpp

 5013   case ISD::BR_CC: {

lib/Target/PowerPC/PPCISelLowering.cpp

 1120   setTargetDAGCombine(ISD::BR_CC);
13988   case ISD::BR_CC: {

lib/Target/RISCV/RISCVISelLowering.cpp

   87   setOperationAction(ISD::BR_CC, XLenVT, Expand);
  159     setOperationAction(ISD::BR_CC, MVT::f32, Expand);
  176     setOperationAction(ISD::BR_CC, MVT::f64, Expand);

lib/Target/Sparc/SparcISelLowering.cpp

 1538   setOperationAction(ISD::BR_CC, MVT::i32, Custom);
 1539   setOperationAction(ISD::BR_CC, MVT::f32, Custom);
 1540   setOperationAction(ISD::BR_CC, MVT::f64, Custom);
 1541   setOperationAction(ISD::BR_CC, MVT::f128, Custom);
 1562     setOperationAction(ISD::BR_CC, MVT::i64, Custom);
 3027   case ISD::BR_CC:              return LowerBR_CC(Op, DAG, *this,

lib/Target/SystemZ/SystemZISelLowering.cpp

  141       setOperationAction(ISD::BR_CC,     VT, Custom);
 4932   case ISD::BR_CC:

lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

  221     for (auto Op : {ISD::BR_CC, ISD::SELECT_CC})

lib/Target/X86/X86ISelLowering.cpp

  322     setOperationAction(ISD::BR_CC,     VT, Expand);
38678         case ISD::BR_CC:

lib/Target/XCore/XCoreISelLowering.cpp

   91   setOperationAction(ISD::BR_CC,     MVT::i32,   Expand);