|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenDAGISel.inc99163 /*223517*/ /*SwitchOpcode*/ 11, TARGET_VAL(ISD::BRIND),// ->223531
gen/lib/Target/AArch64/AArch64GenFastISel.inc 4272 case ISD::BRIND: return fastEmit_ISD_BRIND_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/ARC/ARCGenDAGISel.inc 1006 /* 1699*/ /*SwitchOpcode*/ 11, TARGET_VAL(ISD::BRIND),// ->1713
gen/lib/Target/ARM/ARMGenDAGISel.inc37769 /* 83187*/ /*SwitchOpcode*/ 44, TARGET_VAL(ISD::BRIND),// ->83234
gen/lib/Target/ARM/ARMGenFastISel.inc 2707 case ISD::BRIND: return fastEmit_ISD_BRIND_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc67998 /*131542*/ /*SwitchOpcode*/ 12, TARGET_VAL(ISD::BRIND),// ->131557
gen/lib/Target/Lanai/LanaiGenDAGISel.inc 1243 /* 2265*/ /*SwitchOpcode*/ 11, TARGET_VAL(ISD::BRIND),// ->2279
gen/lib/Target/MSP430/MSP430GenDAGISel.inc 3384 /* 6907*/ /*SwitchOpcode*/ 58, TARGET_VAL(ISD::BRIND),// ->6968
gen/lib/Target/Mips/MipsGenDAGISel.inc23641 /* 44407*/ /*SwitchOpcode*/ 124, TARGET_VAL(ISD::BRIND),// ->44534
gen/lib/Target/Mips/MipsGenFastISel.inc 1195 case ISD::BRIND: return fastEmit_ISD_BRIND_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 6577 /* 12140*/ /*SwitchOpcode*/ 114, TARGET_VAL(ISD::BRIND),// ->12257
gen/lib/Target/Sparc/SparcGenDAGISel.inc 1457 /* 2625*/ /*SwitchOpcode*/ 28, TARGET_VAL(ISD::BRIND),// ->2656
gen/lib/Target/SystemZ/SystemZGenDAGISel.inc16151 /* 29752*/ /*SwitchOpcode*/ 47, TARGET_VAL(ISD::BRIND),// ->29802
gen/lib/Target/X86/X86GenDAGISel.inc40122 /* 84029*/ /*SwitchOpcode*/ 0|128,1/*128*/, TARGET_VAL(ISD::BRIND),// ->84161
gen/lib/Target/X86/X86GenFastISel.inc 5906 case ISD::BRIND: return fastEmit_ISD_BRIND_r(VT, RetVT, Op0, Op0IsKill);
gen/lib/Target/XCore/XCoreGenDAGISel.inc 1307 /* 2159*/ /*SwitchOpcode*/ 34, TARGET_VAL(ISD::BRIND),// ->2196
include/llvm/CodeGen/BasicTTIImpl.h 388 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
include/llvm/CodeGen/TargetLowering.h 1018 isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
4232 return DAG.getNode(ISD::BRIND, dl, MVT::Other, Value, Addr);
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 2936 DAG.setRoot(DAG.getNode(ISD::BRIND, getCurSDLoc(),
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 347 case ISD::BRIND: return "brind";
lib/Target/AArch64/AArch64ISelLowering.cpp 5280 return DAG.getNode(ISD::BRIND, DL, MVT::Other, Op.getOperand(0),
lib/Target/AMDGPU/AMDGPUISelLowering.cpp 243 setOperationAction(ISD::BRIND, MVT::Other, Expand);
lib/Target/AVR/AVRISelDAGToDAG.cpp 456 template <> bool AVRDAGToDAGISel::select<ISD::BRIND>(SDNode *N) {
539 case ISD::BRIND: return select<ISD::BRIND>(N);
539 case ISD::BRIND: return select<ISD::BRIND>(N);
lib/Target/BPF/BPFISelLowering.cpp 73 setOperationAction(ISD::BRIND, MVT::Other, Expand);
lib/Target/NVPTX/NVPTXISelLowering.cpp 439 setOperationAction(ISD::BRIND, MVT::Other, Expand);
lib/Target/PowerPC/PPCISelDAGToDAG.cpp 5056 case ISD::BRIND: {
lib/Target/Sparc/SparcISelLowering.cpp 1536 setOperationAction(ISD::BRIND, MVT::Other, Expand);
lib/Target/WebAssembly/WebAssemblyISelLowering.cpp 75 setOperationAction(ISD::BRIND, MVT::Other, Custom);
992 case ISD::BRIND:
lib/Target/X86/X86ISelDAGToDAG.cpp 4418 case ISD::BRIND: {
4430 SDValue Brind = CurDAG->getNode(ISD::BRIND, dl, MVT::Other,
lib/Target/XCore/XCoreISelDAGToDAG.cpp 202 case ISD::BRIND: