|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenDAGISel.inc63252 /*138098*/ /*SwitchOpcode*/ 21, TARGET_VAL(ISD::BRCOND),// ->138122
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc65431 /*125928*/ /*SwitchOpcode*/ 14|128,1/*142*/, TARGET_VAL(ISD::BRCOND),// ->126074
gen/lib/Target/Mips/MipsGenDAGISel.inc 1375 /* 2465*/ /*SwitchOpcode*/ 43|128,22/*2859*/, TARGET_VAL(ISD::BRCOND),// ->5328
gen/lib/Target/NVPTX/NVPTXGenDAGISel.inc52985 /*114391*/ /*SwitchOpcode*/ 94, TARGET_VAL(ISD::BRCOND),// ->114488
gen/lib/Target/PowerPC/PPCGenDAGISel.inc22728 /* 56125*/ /*SwitchOpcode*/ 55, TARGET_VAL(ISD::BRCOND),// ->56183
gen/lib/Target/RISCV/RISCVGenDAGISel.inc 7667 /* 14405*/ /*SwitchOpcode*/ 4|128,5/*644*/, TARGET_VAL(ISD::BRCOND),// ->15053
gen/lib/Target/WebAssembly/WebAssemblyGenDAGISel.inc12530 /* 24157*/ /*SwitchOpcode*/ 71, TARGET_VAL(ISD::BRCOND),// ->24231
gen/lib/Target/XCore/XCoreGenDAGISel.inc 1330 /* 2196*/ /*SwitchOpcode*/ 55|128,2/*311*/, TARGET_VAL(ISD::BRCOND),// ->2511
lib/CodeGen/SelectionDAG/DAGCombiner.cpp 1586 case ISD::BRCOND: return visitBRCOND(N);
7923 if (Use->getOpcode() == ISD::BRCOND)
7928 if (Use->getOpcode() == ISD::BRCOND)
8842 N->hasOneUse() && N->use_begin()->getOpcode() == ISD::BRCOND;
13319 return DAG.getNode(ISD::BRCOND, SDLoc(N), MVT::Other, Chain, NewN1, N2);
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 3479 case ISD::BRCOND:
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp 1161 case ISD::BRCOND: Res = PromoteIntOp_BRCOND(N, OpNo); break;
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp 2389 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
2452 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
2580 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl,
2668 Root = DAG.getNode(ISD::BRCOND, dl, MVT::Other, Root, RangeCmp,
2727 SDValue BrAnd = DAG.getNode(ISD::BRCOND, dl,
10098 DAG.getNode(ISD::BRCOND, DL, MVT::Other, getControlRoot(), Cond,
lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp 349 case ISD::BRCOND: return "brcond";
lib/Target/AArch64/AArch64ISelLowering.cpp 201 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 883 case ISD::BRCOND:
2012 assert(N->getOpcode() == ISD::BRCOND);
lib/Target/AMDGPU/R600ISelLowering.cpp 148 setOperationAction(ISD::BRCOND, MVT::Other, Custom);
497 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
lib/Target/AMDGPU/SIISelLowering.cpp 225 setOperationAction(ISD::BRCOND, MVT::Other, Custom);
4016 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
lib/Target/ARC/ARCISelLowering.cpp 118 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/ARM/ARMISelLowering.cpp 736 setTargetDAGCombine(ISD::BRCOND);
1289 setOperationAction(ISD::BRCOND, MVT::Other, Custom);
9159 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
14098 if (N->getOpcode() == ISD::BRCOND) {
14429 case ISD::BRCOND:
lib/Target/AVR/AVRISelLowering.cpp 100 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/BPF/BPFISelLowering.cpp 74 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/Lanai/LanaiISelLowering.cpp 87 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/MSP430/MSP430ISelLowering.cpp 87 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/Mips/MipsISelLowering.cpp 358 setOperationAction(ISD::BRCOND, MVT::Other, Custom);
1221 case ISD::BRCOND: return lowerBRCOND(Op, DAG);
lib/Target/Mips/MipsSEISelLowering.cpp 259 setOperationAction(ISD::BRCOND, MVT::Other, Legal);
lib/Target/PowerPC/PPCISelLowering.cpp 369 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
1122 setTargetDAGCombine(ISD::BRCOND);
13969 case ISD::BRCOND: {
lib/Target/Sparc/SparcISelLowering.cpp 1535 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/SystemZ/SystemZISelLowering.cpp 150 setOperationAction(ISD::BRCOND, MVT::Other, Expand);
lib/Target/X86/X86ISelLowering.cpp 319 setOperationAction(ISD::BRCOND , MVT::Other, Custom);
20009 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC &&
27720 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
38679 case ISD::BRCOND: