reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenGlobalISel.inc
 4157         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
 4519         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
gen/lib/Target/AMDGPU/AMDGPUGenGlobalISel.inc
  650       GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
  683       GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
 1413         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
15573         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
15613         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
15678         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
15718         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
15783         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
15823         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
19559         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
19604         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
19649         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
19694         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
19744         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
19755         GIR_AddImplicitDef, /*InsnID*/0, AMDGPU::SCC,
gen/lib/Target/Mips/MipsGenGlobalISel.inc
  950       GIR_AddImplicitDef, /*InsnID*/0, Mips::DSPOutFlag20,
 1024       GIR_AddImplicitDef, /*InsnID*/0, Mips::DSPOutFlag20,
 1321       GIR_AddImplicitDef, /*InsnID*/0, Mips::DSPOutFlag20,
 1373       GIR_AddImplicitDef, /*InsnID*/0, Mips::DSPOutFlag20,
 1515         GIR_AddImplicitDef, /*InsnID*/0, Mips::HI0,
 1516         GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0,
 1539         GIR_AddImplicitDef, /*InsnID*/0, Mips::HI0,
 1540         GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0,
 1563         GIR_AddImplicitDef, /*InsnID*/0, Mips::HI0,
 1564         GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0,
 1583         GIR_AddImplicitDef, /*InsnID*/0, Mips::HI0,
 1584         GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0,
 1585         GIR_AddImplicitDef, /*InsnID*/0, Mips::P0,
 1586         GIR_AddImplicitDef, /*InsnID*/0, Mips::P1,
 1587         GIR_AddImplicitDef, /*InsnID*/0, Mips::P2,
 1611       GIR_AddImplicitDef, /*InsnID*/0, Mips::DSPOutFlag21,
21907         GIR_AddImplicitDef, /*InsnID*/0, Mips::AT,
21916         GIR_AddImplicitDef, /*InsnID*/0, Mips::AT,
21925         GIR_AddImplicitDef, /*InsnID*/0, Mips::AT,
21934         GIR_AddImplicitDef, /*InsnID*/0, Mips::AT,
gen/lib/Target/X86/X86GenGlobalISel.inc
  904         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
  991         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 1078         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 1178         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 1656         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 1707         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 1758         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 1810         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 2213         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 2264         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 2316         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 2694         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 2745         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 3120         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 3456         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 4086         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 4203         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 4616         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 5030         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 5776         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 5905         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 6128         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
 6352         GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
12694         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
12747         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
12798       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
12997         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13050         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13101       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13300         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13353         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13404       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13603         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13656         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13707       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13897       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13912       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
13926       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
15016       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
15031       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
15045       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16329       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
16342       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
16355       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
16684       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16699       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16713       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16735       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16750       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16764       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16793         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16857         GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
16919       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
  820     case GIR_AddImplicitDef: {