reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
556 baseReg = MCOperand::createReg(X86::NoRegister); 590 indexReg = MCOperand::createReg(X86::NoRegister); 612 baseReg = MCOperand::createReg(X86::NoRegister); 614 indexReg = MCOperand::createReg(X86::NoRegister); 633 indexReg = MCOperand::createReg(X86::NoRegister);lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
79 for (unsigned Reg = X86::NoRegister + 1; Reg < X86::NUM_TARGET_REGS; ++Reg) { 605 default: return X86::NoRegister; 629 default: return X86::NoRegister; 666 default: return X86::NoRegister; 702 default: return X86::NoRegister; 777 assert(Res != X86::NoRegister && "Unexpected register or VT");lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
318 if (!((Base.isReg() && Base.getReg() != X86::NoRegister) || Base.isFI())) 324 if (!(Index.isReg() && Index.getReg() == X86::NoRegister)) 326 if (!(Segment.isReg() && Segment.getReg() == X86::NoRegister)) 401 .addReg(X86::NoRegister) 403 .addReg(X86::NoRegister) 421 .addReg(X86::NoRegister) 423 .addReg(X86::NoRegister)lib/Target/X86/X86CallFrameOptimization.cpp
431 (I->getOperand(X86::AddrIndexReg).getReg() != X86::NoRegister) || 432 (I->getOperand(X86::AddrSegmentReg).getReg() != X86::NoRegister) ||lib/Target/X86/X86FixupLEAs.cpp
307 Index.getReg() != X86::NoRegister; 544 Segment.getReg() != X86::NoRegister)lib/Target/X86/X86FrameLowering.cpp
430 PI->getOperand(3).getReg() == X86::NoRegister && 431 PI->getOperand(5).getReg() == X86::NoRegister) { 1077 Register Establisher = X86::NoRegister;lib/Target/X86/X86ISelLowering.cpp
31384 if (AM.IndexReg == X86::NoRegister)
lib/Target/X86/X86InstrInfo.cpp3213 X86::NoRegister) 7578 assert(Op2.isReg() && (Op2.getReg() == X86::NoRegister || 7586 else if ((Op1.isReg() && Op1.getReg() != X86::NoRegister && 7588 (Op2.getReg() != X86::NoRegister && 7596 if ((Op1.isReg() && Op1.getReg() != X86::NoRegister)) { 7606 if (Op && Op2.getReg() != X86::NoRegister) { 7619 assert(Op2.getReg() != X86::NoRegister); 7624 assert(Op2.getReg() != X86::NoRegister); 7630 if (((Op1.isReg() && Op1.getReg() != X86::NoRegister) || Op1.isFI()) && 7631 Op2.getReg() != X86::NoRegister) {lib/Target/X86/X86MCInstLower.cpp
1172 if (DefRegister != X86::NoRegister)
lib/Target/X86/X86OptimizeLEAs.cpp556 .ChangeToRegister(X86::NoRegister, false); 559 .ChangeToRegister(X86::NoRegister, false);lib/Target/X86/X86RegisterInfo.cpp
684 MI.getOperand(3).getReg() != X86::NoRegister || 686 MI.getOperand(5).getReg() != X86::NoRegister)lib/Target/X86/X86SpeculativeLoadHardening.cpp
1721 BaseMO.getReg() != X86::NoRegister) 1723 if (IndexMO.getReg() != X86::NoRegister) 1968 assert(IndexMO.getReg() == X86::NoRegister && 1973 BaseMO.getReg() == X86::NoRegister) { 1992 if (IndexMO.getReg() != X86::NoRegister &&