reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

gen/lib/Target/X86/X86GenRegisterInfo.inc
 4395   extern const TargetRegisterClass FR64XRegClass;

References

gen/lib/Target/X86/X86GenFastISel.inc
  357     return fastEmitInst_r(X86::VMOV64toSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill);
 6447     return fastEmitInst_rr(X86::VADDSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 6578     return fastEmitInst_rr(X86::VDIVSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 6709     return fastEmitInst_rr(X86::VMULSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 6840     return fastEmitInst_rr(X86::VSUBSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 9505     return fastEmitInst_rr(X86::VUCOMISDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
 9906     return fastEmitInst_rr(X86::VMAXSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
10024     return fastEmitInst_rr(X86::VMAXCSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
10238     return fastEmitInst_rr(X86::VMINSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
10356     return fastEmitInst_rr(X86::VMINCSDZrr, &X86::FR64XRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenRegisterInfo.inc
 5712   &X86::FR64XRegClass,
 6226   &X86::FR64XRegClass,
 6233   &X86::FR64XRegClass,
 7767     &X86::FR64XRegClass,
lib/Target/X86/X86ISelLowering.cpp
  520     addRegisterClass(MVT::f64, Subtarget.hasAVX512() ? &X86::FR64XRegClass
 3245           RC = Subtarget.hasAVX512() ? &X86::FR64XRegClass : &X86::FR64RegClass;
45769          RC.hasSuperClassEq(&X86::FR64XRegClass) ||
45895           return std::make_pair(0U, &X86::FR64XRegClass);
46090       Res.second = &X86::FR64XRegClass;
lib/Target/X86/X86InstrInfo.cpp
 3114     if (X86::FR64XRegClass.hasSubClassEq(RC))
lib/Target/X86/X86InstructionSelector.cpp
  183       return STI.hasAVX512() ? &X86::FR64XRegClass : &X86::FR64RegClass;
  685           DstRC == &X86::FR64RegClass || DstRC == &X86::FR64XRegClass) &&
lib/Target/X86/X86RegisterBankInfo.cpp
   55       X86::FR64XRegClass.hasSubClassEq(&RC) ||