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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7158 case X86::ESP: OpKind = MCK_Reg38; break;
gen/lib/Target/X86/X86GenInstrInfo.inc16579 static const MCPhysReg ImplicitList17[] = { X86::ESP, X86::SSP, 0 };
16580 static const MCPhysReg ImplicitList18[] = { X86::ESP, X86::EFLAGS, X86::SSP, 0 };
16611 static const MCPhysReg ImplicitList49[] = { X86::EBP, X86::ESP, 0 };
16635 static const MCPhysReg ImplicitList73[] = { X86::ESP, 0 };
16637 static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
16638 static const MCPhysReg ImplicitList76[] = { X86::ESP, X86::EFLAGS, X86::DF, 0 };
16658 static const MCPhysReg ImplicitList96[] = { X86::EAX, X86::ESP, X86::EFLAGS, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 1593 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP, X86::RBP,
1603 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP,
1613 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RBP,
1643 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1663 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::RBP,
1673 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP,
1733 X86::EAX, X86::ECX, X86::EDX, X86::ESP,
1763 X86::EBP, X86::ESP,
1883 X86::ESP,
2794 { 5U, X86::ESP },
2838 { 4U, X86::ESP },
2961 { 5U, X86::ESP },
3005 { 4U, X86::ESP },
3054 { X86::ESP, -2U },
3204 { X86::ESP, 5U },
3354 { X86::ESP, 4U },
3504 { X86::ESP, -2U },
3654 { X86::ESP, 5U },
3804 { X86::ESP, 4U },
10010 static const MCPhysReg CSR_32_RegCall_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10012 static const MCPhysReg CSR_32_RegCall_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, 0 };
10056 static const MCPhysReg CSR_Win32_CFGuard_Check_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::ECX, 0 };
10058 static const MCPhysReg CSR_Win32_CFGuard_Check_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::ECX, 0 };
lib/Target/X86/AsmParser/X86AsmParser.cpp 1029 IndexReg == X86::ESP || IndexReg == X86::RSP) {
1915 if (Scale == 0 && BaseReg != X86::ESP && BaseReg != X86::RSP &&
1916 (IndexReg == X86::ESP || IndexReg == X86::RSP))
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
507 ALL_REGS
552 ALL_SIB_BASES
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp 575 assert(IndexReg.getReg() != X86::ESP &&
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 109 {codeview::RegisterId::ESP, X86::ESP},
355 unsigned StackPtr = is64Bit ? X86::RSP : X86::ESP;
616 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
644 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
681 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
717 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
718 return X86::ESP;
753 case X86::SPL: case X86::SP: case X86::ESP: case X86::RSP:
lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp 301 case X86::ESP: OS << "$esp"; break;
lib/Target/X86/X86AsmPrinter.cpp 310 assert(IndexReg.getReg() != X86::ESP &&
lib/Target/X86/X86FixupLEAs.cpp 372 if (UseLEAForSP && (DestReg == X86::ESP || DestReg == X86::RSP))
451 if (p.isReg() && p.getReg() != X86::ESP) {
455 if (q.isReg() && q.getReg() != X86::ESP) {
lib/Target/X86/X86FrameLowering.cpp 188 CS != X86::ESP)
798 unsigned SP = Uses64BitFramePtr ? X86::RSP : X86::ESP;
1380 .addReg(X86::ESP);
1646 TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
2376 ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2403 ScratchReg = X86::ESP;
2405 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2678 SPReg = X86::ESP;
2966 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
lib/Target/X86/X86ISelDAGToDAG.cpp 394 if ((RegNode->getReg() == X86::ESP) ||
lib/Target/X86/X86ISelLowering.cpp24257 .Case("esp", X86::ESP)
26653 DAG.getRegister(X86::ESP, MVT::i32), // Base
30058 IsLP64 || Subtarget.isTargetNaCl64() ? X86::RSP : X86::ESP;
lib/Target/X86/X86RegisterInfo.cpp 64 StackPtr = Use64BitReg ? X86::RSP : X86::ESP;
69 StackPtr = X86::ESP;
lib/Target/X86/X86RetpolineThunks.cpp 232 const unsigned SPReg = Is64Bit ? X86::RSP : X86::ESP;