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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 7869 { 0 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, },
8805 { 0 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc49085 /* 92717*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vmpyuhv), 0,
49091 /* 92728*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vmpyuhv), 0,
49101 /* 92745*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vmpyuhv), 0,
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc10868 case Hexagon::V6_vmpyuhv:
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 1343 : (IsSigned ? Hexagon::V6_vmpyhv : Hexagon::V6_vmpyuhv);
1403 SDValue T0 = getInstr(Hexagon::V6_vmpyuhv, dl, PairTy, {Vs, Vt}, DAG);
1411 SDValue T2 = getInstr(Hexagon::V6_vmpyuhv, dl, PairTy, {Vs, D0}, DAG);