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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc 7966 { 0 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, },
8659 { 0 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegs, MCK__41_ }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc45555 /* 86419*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vlsrw), 0,
45561 /* 86430*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vlsrw), 0,
45571 /* 86447*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vlsrw), 0,
70902 /*137770*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vlsrw), 0,
70910 /*137785*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vlsrw), 0,
70916 /*137796*/ OPC_MorphNodeTo1, TARGET_VAL(Hexagon::V6_vlsrw), 0,
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc10546 case Hexagon::V6_vlsrw:
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 1407 SDValue T1 = getInstr(Hexagon::V6_vlsrw, dl, ResTy, {LoVec(T0), S16}, DAG);
1420 SDValue T5 = getInstr(Hexagon::V6_vlsrw, dl, ResTy, {T4, S16}, DAG);