reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc
10203   { 317 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, },
10204   { 317 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, },
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc
19588 /* 37475*/            OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19622 /* 37538*/            OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19688 /* 37653*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19696 /* 37667*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19752 /* 37769*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19760 /* 37784*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19806 /* 37864*/            OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19840 /* 37927*/            OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19906 /* 38042*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19914 /* 38056*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19970 /* 38158*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
19978 /* 38173*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
20024 /* 38253*/            OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
20058 /* 38316*/            OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
20124 /* 38431*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
20132 /* 38445*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
20188 /* 38547*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
20196 /* 38562*/              OPC_MorphNodeTo0, TARGET_VAL(Hexagon::V6_vS32Ub_ai), 0|OPFL_Chain|OPFL_MemRefs,
gen/lib/Target/Hexagon/HexagonGenInstrInfo.inc
17666   { Hexagon::V6_vS32Ub_ai, Hexagon::V6_vS32Ub_pred_ai, Hexagon::V6_vS32Ub_npred_ai },
gen/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc
 4022     case Hexagon::V6_vS32Ub_ai:
lib/Target/Hexagon/HexagonAsmPrinter.cpp
  659   case Hexagon::V6_vS32Ub_ai:
lib/Target/Hexagon/HexagonFrameLowering.cpp
 1762                                      : Hexagon::V6_vS32Ub_ai;
 1773                                                      : Hexagon::V6_vS32Ub_ai;
 1844                                             : Hexagon::V6_vS32Ub_ai;
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
  511       Opcode = IsValidInc ? Hexagon::V6_vS32Ub_pi : Hexagon::V6_vS32Ub_ai;
lib/Target/Hexagon/HexagonInstrInfo.cpp
  297     case Hexagon::V6_vS32Ub_ai:
  924     unsigned Opc = SlotAlign < RegAlign ? Hexagon::V6_vS32Ub_ai
 1095       unsigned NewOpc = Aligned ? Hexagon::V6_vS32b_ai : Hexagon::V6_vS32Ub_ai;
 2696   case Hexagon::V6_vS32Ub_ai: {