reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/ARM/ARMAsmPrinter.cpp

  314         RegBegin = TRI->getSubReg(RegBegin, ARM::gsub_1);
  382             TRI->getSubReg(MO.getReg(), FirstHalf ? ARM::gsub_0 : ARM::gsub_1);
  425       Reg = TRI->getSubReg(Reg, ARM::gsub_1);

lib/Target/ARM/ARMBaseInstrInfo.cpp

 1089           AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
 1100           AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
 1328         AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);
 1339         MIB = AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  295       return RI->getSubReg(*Supers, Odd ? ARM::gsub_1 : ARM::gsub_0);

lib/Target/ARM/ARMExpandPseudoInsts.cpp

 1040     Register RegHi = TRI->getSubReg(Reg.getReg(), ARM::gsub_1);
 1065   Register DestHi = TRI->getSubReg(Dest.getReg(), ARM::gsub_1);
 1067   Register DesiredHi = TRI->getSubReg(DesiredReg, ARM::gsub_1);

lib/Target/ARM/ARMISelDAGToDAG.cpp

 1694   SDValue SubReg1 = CurDAG->getTargetConstant(ARM::gsub_1, dl, MVT::i32);
 3884             CurDAG->getTargetConstant(ARM::gsub_1, dl, MVT::i32);
 4730       SDValue Sub1 = CurDAG->getTargetExtractSubreg(ARM::gsub_1, dl, MVT::i32,

lib/Target/ARM/ARMISelLowering.cpp

 9063   SDValue SubReg1 = DAG.getTargetConstant(ARM::gsub_1, dl, MVT::i32);
 9088       DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_1 : ARM::gsub_0,
 9091       DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_0 : ARM::gsub_1,

lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp

  831   printRegName(O, MRI.getSubReg(Reg, ARM::gsub_1));

lib/Target/ARM/Thumb2InstrInfo.cpp

  169     AddDReg(MIB, SrcReg, ARM::gsub_1, 0, TRI);
  210     AddDReg(MIB, DestReg, ARM::gsub_1, RegState::DefineNoRead, TRI);